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TCA8418RTWR Datasheet(PDF) 9 Page - Texas Instruments

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Part # TCA8418RTWR
Description  I2C CONTROLLED KEYPAD SCAN IC WITH INTEGRATED ESD PROTECTION
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TCA8418RTWR Datasheet(HTML) 9 Page - Texas Instruments

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VCC
Ramp-Up
Time to Re-Ramp
Time
Ramp-Down
VIN drops below POR levels
VCC_RT
VCC_FT
VCC_TRR_VPOR50
V
CC
Time
V
CC_GH
V
CC_GW
TCA8418
www.ti.com ......................................................................................................................................................................................... SCPS215 – SEPTEMBER 2009
Figure 2. VCC is Lowered Below the POR Threshold, Then Ramped Back Up to VCC
Table 1 specifies the performance of the power-on reset feature for TCA8418E for both types of power-on reset.
Table 1. RECOMMENDED SUPPLY SEQUENCING AND RAMP RATES(1)
PARAMETER
MIN
TYP
MAX
UNIT
VCC_FT
Fall rate
See Figure 1
1
100
ms
VCC_RT
Rise rate
See Figure 1
0.01
100
ms
VCC_TRR_GND
Time to re-ramp (when VCC drops to GND)
See Figure 1
0.001
ms
VCC_TRR_POR50
Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV)
See Figure 2
0.001
ms
Level that VCCP can glitch down to, but not cause a functional
VCC_GH
See Figure 3
1.2
V
disruption when VCCX_GW = 1 µs
Glitch width that will not cause a functional disruption when
VCC_GW
See Figure 3
µs
VCCX_GH = 0.5 × VCCx
VPORF
Voltage trip point of POR on falling VCC
0.767
1.144
V
VPORR
Voltage trip point of POR on rising VCC
1.033
1.428
V
(1)
TA = –40°C to 85°C (unless otherwise noted)
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width
(VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and
device impedance are factors that affect power-on reset performance. Figure 3 and Table 1 provide more
information on how to measure these specifications.
Figure 3. Glitch Width and Glitch Height
VPOR is critical to the power-on reset. VPOR is the voltage level at which the reset condition is released and all the
registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based
on the VCC being lowered to or from 0. Figure 4 and Table 1 provide more details on this specification.
Copyright © 2009, Texas Instruments Incorporated
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