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TPS658620ZQZT Datasheet(PDF) 6 Page - Texas Instruments |
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TPS658620ZQZT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 104 page  TPS658620 Advanced Power Management Unit SLVS993 – OCTOBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RTC_OUT LDO VO(RTC_OUT) RTC_OUT output voltage (1):V O(RTC_OUT)TYP=1.25, 1.50, 1.8, V Output Voltage, Selectable via I 2C 2.5, 2.7,2.85,3.1,3.3 Dropout voltage, I(RTC_OUT) = –15 mA 600 mV V(SYS) = 2.8 V Total accuracy, V(AC):2V to 4.7V, –15mA load, –5% 5% V(BAT1)=V(BAT2)=V(USB)=0V Load regulation, V(AC)=3.5V, 1% load: 1mA → –15mA Line regulation, 5mA load,V(AC): 3.5V →18V, 1% V(BAT1) =V(BAT2) =V(USB) =0V ISHRTC Short Circuit current limit 20 mA V(RTCGOOD) RTC_OUT power good fault detection 2.3 2.35 2.45 V Falling RTC_OUT pin voltage, set via I 2C threshold 1.8 1.90 2.0 VHYS(RTC) Power good fault detection hysteresis Rising RTC_OUT pin voltage (Referenced to V(RTCGOOD) threshold) 50 75 130 mV VUVLO_RTC Internal RTC UVLO detection threshold VRTC Decreasing –10% 1.5 10% V VUVLO_RTC_HYS UVLO detection hysteresis VRTC Increasing 100 150 200 mV BOOT-UP TIMING TPOR Power-on-reset delay Fixed time, measured from 2V2>UVLO 7.2 8 8.8 ms TBOOT Boot-up time Fixed time 500 ms Accuracy, referenced to TBOOT(tTYP) –10% 10% THOTPLUG Hot plug deglitch time Fixed time 675 750 825 ms TWAKEUP Wakeup pulse width Fixed time 225 250 275 µs TCHECK RTC check wait time Fixed time 2.7 3 3.3 ms TMAX RTC_ON watchdog timer Fixed time 4 ×T NORTC ms TNORTC NORTC pin pulse width value Fixed time 10 ms Accuracy, relative to TNORTC (TYP) –10% 10% KNOPOWER NOPOWER pin pulse width const. TNOPOWER = KNOPOWER × CNOPOWER 0.25 ms/nF Pulse width accuracy, CNOPOWER < 400nF –25% 25% TWAIT Reboot and sleep request timeout Fixed time 18 20 22 ms TWAIT1 4.5 5 5.5 ms TSYNCEND Synchronization complete delay Measured from all supplies synchronized 4.5 5 5.5 ms TSYNCDLY Supply sync delay time Regulator specific. See Table 3-17 TSYNCDLY(TYP) = 1.25, 2.5, 3.75, 15, ms 20, 32, 40, 64 Accuracy, relative to TSYNCDLY(TYP) -10 +10 POWER GOOD AND THERMAL FAULT DETECTION TDGL(PGFLT) Power good deglitch time Applies to all non-masked power good signals, output voltage falling 4 5 6 ms edge. TSHUT Thermal shutdown Increasing junction temperature 150 °C THYS(SHUT) Thermal shutdown hysteresis Decreasing junction temperature 30 °C TDGL(TSHUT) Thermal shutdown detection delay Rising temperature 15 20 25 µs RESUME CONTROL TIMING TRESUME(H) RESUME pulse width high 550 ms TRESUME(L) RESUME pulse width low 1500 ms SEQUENCER REBOOT CONTROL VHOTRST Reboot control threshold Reboot started when normal state is set and 0.4 V V(HOT_RST) < VREBOOT for t > TDT(HRST) THRST(H) HOT_RST max pulse width 60 ms TDT(HRST) HOT_RST min detection pulse width HOT_RST deglitch 4 16 µs (1) Setting the RTC_OUT output voltage below the RTC_OUT power good threshold will result in a NORTC pulse being always generated during reboot cycles or when exiting sleep. Setting the RTC_OUT output voltage below VUVLO_RTC disables the use of the internal real time clock counter and xtal oscillator. Electrical Specifications 6 Submit Documentation Feedback |
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