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TRF2443IPFPR Datasheet(PDF) 11 Page - Texas Instruments |
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TRF2443IPFPR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 72 page  RF SYNTHESIZER CHARACTERISTICS TRF2443 www.ti.com ................................................................................................................................... SLWS217A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009 VCC_3V = 3.3 V ±5%, TJ = 65°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TXVCO ftxvco TXVCO frequency range See (1) 2640 2800 MHz Divide-by-8 mode 330 350 ftxlo TXLO frequency range MHz Divide-by-16 mode 165 175 fout = 340 MHz; offset = 10 kHz –92.5 fout = 340 MHz; offset = 100 kHz –117.5 TXLO free-running phase noise dBc/Hz fout = 340 MHz; offset = 1 MHz –140 fout = 340 MHz; offset = 20 MHz –150 KvTX TXVCO gain 45 MHz/V TXPLL fPFD PFD frequency 20 MHz fout = 340 MHz; offset = 20 kHz –117 fout = 340 MHz; offset = 100 kHz –116 TXLO closed-loop phase noise dBc/Hz fout = 340 MHz; offset = 1 MHz –140 fout = 340 MHz; offset = 20 MHz –150 Integrated TXLO noise Integrated from 1 kHz to 12 MHz; fout = 340 MHz (2) –56.5 dB Reference spur Measured at TXLOTEST (2720 MHz) –70 dBc From unlocked state to locked state (includes Lock time 300 µs digital-calibration time)(3) fout = 165 MHz; offset = 20 kHz –121 fout = 165 MHz; offset = 100 kHz –120 TXLO closed-loop phase noise dBc/Hz fout = 165 MHz; offset = 1 MHz –141 fout = 165 MHz; offset = 20 MHz –147 Vccmin PLL-lock minimum power supply TJ = 65°C 2.8 V RXVCO frxvco RXVCO frequency range See (1) 2240 2640 MHz Divide-by-8 mode 280 330 frxlo RXLO frequency range MHz Divide-by-16 mode 140 165 fout = 140 MHz; offset = 10 kHz –97.5 fout = 140 MHz; offset = 100 kHz –122.5 RXLO free-running phase noise dBc/Hz fout = 140 MHz; offset = 1 MHz –146 fout = 140 MHz; offset = 20 MHz –150 KvRX RXVCO gain 45 MHz/V RXPLL fPFD PFD frequency 20 MHz Integrated from 1 kHz to 12 MHz; fout = 140 MHz (2) –62 Integrated RXLO noise dB Integrated from 1 kHz to 12 MHz; fout = 160 MHz (2) –60 fout = 140 MHz; offset = 20 kHz –122 fout = 140 MHz; offset = 100 kHz –121 RXLO closed-loop phase noise dBc/Hz fout = 140 MHz; offset = 1 MHz –146 fout = 140 MHz; offset = 20 MHz –150 Reference spur Measured at RXLOTEST (2240 MHz) –65 dBc From unlock state to lock state (includes Lock time 300 µs digital-calibration time)(3) (1) Frequency range proven locked with PFD frequency = 20 MHz (2) Optimized for lowest integrated noise; see the Reference-Clock Characteristics table for recommended reference clock performance. (3) Charge-pump current = 1 mA, PFD frequency = 20 MHz, loop filter optimized (see Application Schematic section) Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TRF2443 |
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