TPS386000

DSP

CPU

FPGA

DC-DC

LDO

SubCPU

MSP430

AMP

DC-DC

LDO

DC-DC

LDO

Pos

and

Neg

DC-DC

VCC41

VCC42

VIN

VCC3

VCC41(positive)&VCC42(neagtive)

VCC2

VCC1

Sequence:VIN

EN3

EN4

VCC2

VCC3

EN2

VCC1

WDO

SENSE1

CT1

CT1

CT2

CT2

CT3

CT4

CT3

CT4

GND

WDI

VCC

VCC1

VCC2

VCC3

VCC-

VCC+

CLK

SENSE2

SENSE3

SENSE4L

SENSE4H

RS41L

RS42H

RS42L

RS41H

RS3L

RS2L

RS1L

RS3H

RS2H

RS1H

RP3

RP4

RP2 RP1

VREF

RESET1

RESET

MR

RESET2

RESET3

RESET4

RP5

TPS386000, TPS386020

TPS386040, TPS386060

www.ti.com

Quad Supply Voltage Supervisors

with Programmable Delay and Watchdog Timer

Check for Samples: TPS386000 TPS386020 TPS386040 TPS386060

1

FEATURES

DESCRIPTION

2

•

4 Complete SVS Modules on 1 Silicon Platform

The TPS3860x0 family of voltage supervisors can

monitor four power rails that are greater than 0.4V

•

Programmable Delay Time: 1.4ms to 10s

with a 0.25% (typical) threshold accuracy. Each of the

•

Very Low Quiescent Current: 12

μA typ

four supervisory circuits (SVS-n) assert a RESETn or

•

Threshold Accuracy: 0.25% typ

RESETn output signal when the SENSEm input

•

Adjustable Threshold Down to 0.4V

voltage drops below the programmed threshold. With

external resistors, the threshold of each SVS-n can

•

SVS-1: Manual Reset (MR) Input

be programmed (where n = 1, 2, 3, 4 and m = 1, 2, 3,

•

SVS-4: Window Comparator or Low-Voltage

4L, 4H).

Sensing with VREF (1.2V) Pin

Each SVS-n has a programmable delay before

•

Watchdog Timer with Dedicated Output

releasing RESETn or RESETn, and the delay time

•

Well-Controlled RESETn Output During

can be set from 1.4ms to 10s through the CTn pin

Power-Up

connection. Only SVS-1 has an active-low manual

reset (MR) input; a logic-low input to MR asserts

•

TPS386000: Open-Drain RESETn and WDO

RESET1 or RESET1.

•

TPS386020: Open-Drain RESETn and WDO

SVS-4 monitors the threshold window using two

•

TPS386040: Push-Pull RESETn and WDO

comparators.

The

extra

comparator

can

be

•

TPS386060: Push-Pull RESETn and WDO

configured as a fifth SVS to monitor negative voltage

•

Package: 4mm x 4mm, 20-pin QFN

with voltage reference output VREF.

The TPS3860x0 has a very low quiescent current of

APPLICATIONS

12μA (typical) and is available in a small, 4mm x

•

Analog Sequencing

4mm, QFN-20 package.

•

All DSP and Microcontroller Applications

•

All FPGA/ASIC Applications

Figure 1. TPS386000 Typical Application Circuit

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2009, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.