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ICS9UMS9633BW Datasheet(PDF) 3 Page - Integrated Device Technology |
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ICS9UMS9633BW Datasheet(HTML) 3 Page - Integrated Device Technology |
3 / 18 page IDTTM/ICSTM Ultra Mobile PC Clock for Automotive use 1425A—09/02/09 ICS9UMS9633BW ULTRA MOBILE PC CLOCK FOR AUTOMOTIVE USE 3 Datasheet SSOP Pin Description (continued) PIN # PIN NAME TYPE DESCRIPTION 25 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 26 SRCC1_LPR OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 27 SRCT1_LPR OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 28 GNDSRC PWR Ground pin for the SRC outputs 29 SRCC2_LPR OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 30 SRCT2_LPR OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 31 *CR#2 IN Clock request for SRC2, 0 = enable, 1 = disable 32 FSB_L IN Low threshold input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. 33 CPUC2_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 34 CPUT2_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 35 GNDCPU PWR Ground pin for the CPU outputs 36 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 37 VDDCORE_3.3 PWR 3.3V power for the PLL core 38 CPUC1_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 39 CPUT1_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 40 GNDCPU PWR Ground pin for the CPU outputs 41 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 42 CPUC0_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 43 CPUT0_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 44 CPU_STOP# IN Stops CPU0 clock when enabled. 45 CLKPWRGD#/PD_3.3 IN This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs are valid and are ready to be sampled. This is an active low input. / Asynchronous active high input pin used to place the device into a power down state. 46 X2 OUT Crystal output, Nominally 14.318MHz 47 X1 IN Crystal input, Nominally 14.318MHz. 48 VDDREF_3.3 PWR Power pin for the XTAL and REF clocks, nominal 3.3V |
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