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72V84L15PAG Datasheet(PDF) 10 Page - Integrated Device Technology |
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72V84L15PAG Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 12 page 10 COMMERCIALTEMPERATURERANGE IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9 FEBRUARY 5, 2009 NOTES: 1. For depth expansion block see section on Depth Expansion and Figure 14. 2. For Flag detection see section on Width Expansion and Figure 13. Figure 15. Compound FIFO Expansion Figure 17. Read Data Flow-Through Mode Figure 16. Bidirectional FIFO Mode W DATA R tRPE IN EF DATA OUT tWLZ tWEF tA tREF DATA VALID OUT 3966 drw 19 IDT 7201A RA EFA HFA WA FFA WB FFB SIDE 1 SIDE 2 QA 0-8 DA 0-8 QB 0-8 RB HFB EFB IDT 72V81 72V82 72V83 72V84 72V85 DA 0-8 FIFO B 3966 drw 18 FIFO A IDT 72V81/72V82/72V83 72V84/72V85 DEPTH EXPANSION BLOCK R, W, RS D0-DN Q0-Q8 Q(N-8)-QN 3966 drw 17 Q9-Q17 Q0-Q8 Q9-Q17 Q(N-8)-QN D(N-8)-DN D9-D17 D9-DN D18-DN D(N-8)-DN D0-D8 IDT 72V81/72V82/72V83 72V84/72V85 DEPTH EXPANSION BLOCK IDT 72V81/72V82/72V83 72V84/72V85 DEPTH EXPANSION BLOCK |
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