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December 5, 2008

© 2008 Integrated Device Technology, Inc.

DSC 3486/2

Block Diagram

The IDT logo is a trademark and RC4600, RC4650, RC3081,RC3052,RC3051,RC3041 RISController, and RISCore are trademarks of Integrated Device Technology, Inc.

267 MHz 64-bit CPU

64-bit Register File

64-bit Adder

Store Aligner

Logic Unit

Load Aligner

High-Performance

Integer Multiply

FP Register File

FP Add/Sub/Cvt/

Pack/Unpack

FP Multiply

89 MFlops Single-Precision FPA

Div/Sqrt

32-bit

Synchronized

System Interface

Address Translation/

Cache Attribute Control

Exception Management

Functions

System Control Coprocessor

Data Cache

Data Cache

Instruction Bus

Control Bus

Data Bus

Set A

(Lockable)

Set B

Instruction Cache

Set B

Instruction Cache

Set A

(Lockable)

Features

◆

High-performance embedded 64-bit microprocessor

– 64-bit integer operations

– 64-bit registers

– Based on the MIPS RISC Architecture

– 100MHz, 133MHz, 150MHz, 180MHz, 200MHz and 267MHz

operating frequencies

– 32-bit bus interface brings 64-bit power to 32-bit system cost

◆

High-performance DSP capability

– 133.5 Million Integer Mul-Accumulate

operations/sec @267MHz

– 89 MFlops floating-point operations @267MHz

◆

High-performance microprocessor

– 133.5 M Mul-Add/second @267MHz

– 89 MFlops @267MHz

– >640,000 dhrystone (2.1)/sec capability @267MHz (352

dhrystone MIPS)

◆

High level of integration

– 64-bit, 267 MHz integer CPU

– 8KB instruction cache; 8KB data cache

– Integer multiply unit with 133.5M Mul-Add/sec

◆

Upwardly software compatible with IDT RISController

Family

◆

Easily upgradable to 64-bit system

◆

Low-power operation

– Active power management powers-down inactive units

– Standby mode

◆

Large, efficient on-chip caches

– Separate 8KB Instruction and 8KB Data caches

– Over 3200MB/sec bandwidth from internal caches

– 2-set associative

– Write-back and write-through support

– Cache locking, to facilitate deterministic response

– High performance write protocols, for graphics and data

communications

◆

Bus compatible with RC4000 family

– System interfaces to 125MHz, provides bandwidth up to 500

MB/sec

– Direct interface to 32-bit wide systems

– Synchronized to external reference clock for multi- master

operation

– Socket compatible with IDT RC 64474 and RC64574

◆

Improved real-time support

– Fast interrupt decode

– Optional cache locking

Note: “R” refers to 5V parts; “RV” refers to 3.3V parts; “RC”

refers to both

Low-Cost Embedded

64-bit RISController

w/ DSP Capability