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ICS1893BFILF Datasheet(PDF) 6 Page - Integrated Device Technology |
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ICS1893BFILF Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 138 page ICS1893BF, Rev. E, 8/11/09 August, 2009 6 Table of Contents ICS1893BF Data Sheet - Release Copyright © 2009, IDT, Inc. All rights reserved. Table of Contents Section Title Page 7.11 Register 16: Extended Control Register ................................................................76 7.11.1 Command Override Write Enable (bit 16.15) .........................................................77 7.11.2 ICS Reserved (bits 16.14:11) .................................................................................77 7.11.3 PHY Address (bits 16.10:6) ...................................................................................77 7.11.4 Stream Cipher Scrambler Test Mode (bit 16.5) .....................................................77 7.11.5 ICS Reserved (bit 16.4) .........................................................................................77 7.11.6 NRZ/NRZI Encoding (bit 16.3) ...............................................................................77 7.11.7 Invalid Error Code Test (bit 16.2) ...........................................................................78 7.11.8 ICS Reserved (bit 16.1) .........................................................................................78 7.11.9 Stream Cipher Disable (bit 16.0) ............................................................................78 7.12 Register 17: Quick Poll Detailed Status Register ...................................................79 7.12.1 Data Rate (bit 17.15) ..............................................................................................80 7.12.2 Duplex (bit 17.14) ...................................................................................................80 7.12.3 Auto-Negotiation Progress Monitor (bits 17.13:11) ................................................80 7.12.4 100Base-TX Receive Signal Lost (bit 17.10) .........................................................81 7.12.5 100Base PLL Lock Error (bit 17.9) .........................................................................81 7.12.6 False Carrier (bit 17.8) ...........................................................................................82 7.12.7 Invalid Symbol (bit 17.7) ........................................................................................82 7.12.8 Halt Symbol (bit 17.6) ............................................................................................82 7.12.9 Premature End (bit 17.5) ........................................................................................83 7.12.10 Auto-Negotiation Complete (bit 17.4) .....................................................................83 7.12.11 100Base-TX Signal Detect (bit 17.3) .....................................................................83 7.12.12 Jabber Detect (bit 17.2) .........................................................................................83 7.12.13 Remote Fault (bit 17.1) ..........................................................................................83 7.12.14 Link Status (bit 17.0) ..............................................................................................83 7.13 Register 18: 10Base-T Operations Register ..........................................................84 7.13.1 Remote Jabber Detect (bit 18.15) ..........................................................................84 7.13.2 Polarity Reversed (bit 18.14) .................................................................................85 7.13.3 ICS Reserved (bits 18.13:6) ...................................................................................85 7.13.4 Jabber Inhibit (bit 18.5) ..........................................................................................85 7.13.5 ICS Reserved (bit 18.4) .........................................................................................85 7.13.6 Auto Polarity Inhibit (bit 18.3) .................................................................................85 7.13.7 SQE Test Inhibit (bit 18.2) ......................................................................................85 7.13.8 Link Loss Inhibit (bit 18.1) ......................................................................................86 7.13.9 Squelch Inhibit (bit 18.0) ........................................................................................86 |
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