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ICS8430S07I Datasheet(PDF) 9 Page - Integrated Device Technology |
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ICS8430S07I Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 26 page ICS8430S07AKI REVISION A SEPTEMBER 3, 2009 9 ©2009 Integrated Device Technology, Inc. ICS8430S07I Data Sheet CLOCK GENERATOR FOR CAVIUM PROCESSORS Typical Phase Noise at 125MHz (QD output @ 3.3V) Typical Phase Noise at 25MHz (QREF output @ 3.3V) GbE Filter Phase Noise Result by adding a GbE filter to raw data Raw Phase Noise Data 125MHz RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.78ps (typical) Offset Frequency (Hz) GbE Filter Phase Noise Result by adding a GbE filter to raw data Raw Phase Noise Data 125MHz RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.73ps (typical) Offset Frequency (Hz) |
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