85105AGILF datasheet(1/16 Pages) IDT

Part #	85105AGILF

Description	LOW SKEW, 1-TO-5, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER

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Manufacturer	IDT [Integrated Device Technology]

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LOW SKEW, 1-TO-5, DIFFERENTIAL/

LVCMOS-TO-0.7V HCSL FANOUT BUFFER

ICS85105I

IDT™ / ICS™ 0.7V HCSL FANOUT BUFFER

1

ICS85105AGI REV. A JUNE 5, 2008

GENERAL DESCRIPTION

The ICS85105I is a low skew, high performance 1-

to-5 Differential-to-0.7V HCSL Fanout Buffer and

a member of the HiPerClockS™ family of High

Pe r fo r mance Clock Solutions from IDT. The

ICS85105I has two selectable clock inputs. The

CLK0, nCLK0 pair can accept most standard differential

input levels. The single-ended CLK1 can accept LVCMOS or

LVTTL input levels. The clock enable is internally synchronized

to eliminate runt clock pulses on the outputs during asynchro-

nous assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make

the ICS85105I ideal for those applications demanding well

defined performance and repeatability.

FEATURES

• Five 0.7V differential HCSL outputs

• Selectable differential CLK0, nCLK0 or LVCMOS inputs

• CLK0, nCLK0 pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• CLK1 can accept the following input levels:

LVCMOS or LVTTL

• Maximum output frequency: 500MHz

• Translates any single-ended input signal to 3.3V

HCSL levels with resistor bias on nCLK input

• Output skew: 100ps (maximum)

• Part-to-part skew: 600ps (maximum)

• Propagation delay: 3.2ns (maximuml)

• Additive phase jitter, RMS: 0.24ps (typical)

• 3.3V operating supply

• -40°C to 85°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

HiPerClockS™

ICS

BLOCK DIAGRAM

PIN ASSIGNMENT

GND

CLK_EN

CLK_SEL

CLK0

nCLK0

CLK1

Q4

nQ4

IREF

VDD

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

Q0

nQ0

VDD

Q1

nQ1

Q2

nQ2

VDD

Q3

nQ3

ICS85105I

20-Lead TSSOP

6.5mm x 4.4mm x 0.925mm Package Body

G Package

Top View

Q0

nQ0

Q1

nQ1

CLK_EN

CLK_SEL

IREF

CLK1

CLK0

nCLK0

D

LE

Q

0

1

Q2

nQ2

Q4

nQ4

Q3

nQ3

Pulldown

Pullup

Pullup/Pulldown

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