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ICS874001I-05 Datasheet(PDF) 10 Page - Integrated Device Technology |
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ICS874001I-05 Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 17 page IDT™ / ICS™ PCI EXPRESS JITTERATTENUATOR 10 ICS874001AGI-05 REV. A APRIL 20, 2009 ICS874001I-05 PCI EXPRESS™ JITTER ATTENUATOR 3.3V LVDS DRIVER TERMINATION A general LVDS interface is shown in Figure 4. In a 100 Ω differential transmission line environment, LVDS dr ivers require a matched load ter mination of 100 Ω across near FIGURE 4. TYPICAL LVDS DRIVER TERMINATION the receiver input. For a multiple LVDS outputs buffer, if only partial outputs are used, it is recommended to terminate the unused outputs. INPUTS: LVCMOS CONTROL PINS All control pins have internal pullups or pulldowns; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. RECOMMENDATIONS FOR UNUSED INPUT PINS 3.3V LVDS Driver R1 100 Ω – + 3.3V 50 Ω 50 Ω 100 Ω Differential Transmission Line |
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