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ATSAM3U4CA-CU Datasheet(PDF) 1 Page - ATMEL Corporation |
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ATSAM3U4CA-CU Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 61 page NOTE: This is a summary document. The complete document is available on the Atmel website at www.atmel.com. Features • Core – ARM® Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit (MPU) –Thumb®-2 instruction set • Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator, dual bank – From 16 to 48 Kbytes embedded SRAM with dual banks – 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines – Static Memory Controller (SMC): SRAM, NOR, NAND support. NAND Flash controller with 4-kbyte RAM buffer and ECC • System – Embedded voltage regulator for single supply operation – POR, BOD and Watchdog for safe reset – Quartz or resonator oscillators: 3 to 20 MHz main and optional low power 32.768 kHz for RTC or device clock. – High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz Default Frequency for fast device startup – Slow Clock Internal RC oscillator as permanent clock for device clock in low power mode – One PLL for device clock and one dedicated PLL for USB 2.0 High Speed Device – Up to 19 peripheral DMA (PDC) channels and 4-channel central DMA • Low Power Modes – Sleep and Backup modes, down to 2.5 µA in Backup mode. – Backup domain: VDDBU pin, RTC, 32 backup registers – Ultra low power RTC: 0.6 µA • Peripherals – USB 2.0 Device: 480 Mbps, 4-kbyte FIFO, up to 7 bidirectional Endpoints, dedicated DMA – Up to 4 USARTs (ISO7816, IrDA®, Flow Control, SPI, Manchester support) and one UART – Up to 2 TWI (I2C compatible), 1 SPI, 1 SSC (I2S), 1 HSMCI (SDIO/SD/MMC) – 3-Channel 16-bit Timer/Counter (TC) for capture, compare and PWM – 4-channel 16-bit PWM (PWMC) – 32-bit Real Time Timer (RTT) and RTC with calendar and alarm features – 8-channel 12-bit 1Msps ADC with differential input mode and programmable gain stage, 8-channel 10-bit ADC • I/O – Up to 96 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die Series Resistor Termination – Three 32-bit Parallel Input/Outputs (PIO) • Packages – 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm – 100-ball LFBGA, 9 x 9 mm, pitch 0.8 mm – 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm – 144-ball LFBGA, 10 x 10 mm, pitch 0.8 mm AT91ARM M3 Cortex-based Processor ATSAM3U Series Preliminary Summary 6430BS–ATARM–01-Sep-09 |
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