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AT89S8253-24PSU Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT89S8253-24PSU Datasheet(HTML) 11 Page - ATMEL Corporation |
11 / 60 page 11 3286M–MICRO–10/09 AT89S8253 7. Power-On Reset A Power-On Reset (POR) is generated by an on-chip detection circuit. The detection level is nominally 1.4V. The POR is activated whenever V CC is below the detection level. The POR cir- cuit can be used to trigger the start-up reset or to detect a supply voltage failure in devices without a brown-out detector. The POR circuit ensures that the device is reset from power-on. When V CC reaches the Power-on Reset threshold voltage, the POR delay counter determines how long the device is kept in POR after V CC rise, nominally 2 ms. The POR signal is activated again, without any delay, when V CC falls below the POR threshold level. A Power-On Reset (i.e. a cold reset) will set the POF flag in PCON. Figure 7-1. Power-up and Brown-out Detection Sequence 7.1 Brown-out Reset The AT89S8253 has an on-chip Brown-out Detection (BOD) circuit for monitoring the V CC level during operation by comparing it to a fixed trigger level of 2.4V (max). The trigger level for the BOD is nominally 2.2V. The purpose of the BOD is to ensure that if V CC fails or dips while exe- cuting at speed, the system will gracefully enter reset without the possibility of errors induced by incorrect execution. When V CC decreases to a value below the trigger level, the Brown-out Reset is immediately activated. When V CC increases above the trigger level, the BOD delay counter starts the MCU after the timeout period has expired in approximately 2 ms. POR POR Level 1.4V BOD Level 2.3V Min V CC Level 2.7V XTAL1 BOD Internal RESET t t t t t V CC t POR (2 ms) t POR (2 ms) 2.4V 1.2V 0 |
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