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MEGA32M1-ESAZ Datasheet(PDF) 8 Page - ATMEL Corporation |
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MEGA32M1-ESAZ Datasheet(HTML) 8 Page - ATMEL Corporation |
8 / 365 page 8 7647F–AVR–04/09 ATmega16/32/64/M1/C1 2. Overview The ATmega16/32/64/M1/C1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16/32/64/M1/C1 achieves throughputs approaching 1 MIPS per MHz allowing the sys- tem designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1. Block Diagram The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than con- ventional CISC microcontrollers. Flash Program Memory Instruction Register Instruction Decoder Program Counter Control Lines 32 x 8 General Purpose Registrers ALU Status and Control I/O Lines EEPROM Data Bus 8-bit Data SRAM Interrupt Unit SPI Unit Watchdog Timer 4 Analog Comparators DAC ADC MPSC Timer 1 Timer 0 HW LIN/UART CAN Current Source |
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