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AT7913E Advanced Information

7833B–AERO–05/09

4.2

Debug Support Unit

The AT7913E SpaceWire RTC includes a hardware debug support to aid software

debugging on target hardware. The support is provided through two modules:

• a debug support unit (DSU)

• a debug communication link

4.2.1

Debug Support Unit

The DSU can put the processor in debug mode, allowing read/write access to all pro-

cessor registers and cache memories. The DSU also contains a trace buffer which

stores executed instructions and/or data transfers on the AMBA AHB bus.

The debug support unit is used to control the trace buffer and the processor debug

mode. The DSU is attached to the AHB bus as slave, occupying a 2 Mbyte address

space. Through this address space, any AHB master can access the processor regis-

ters and the contents of the trace buffer.

The DSU control registers can be accessed at any time, while the processor registers

and caches can only be accessed when the processor has entered debug mode. The

trace buffer can be accessed only when tracing is disabled/completed. In debug mode,

the processor pipeline is held and the processor state can be accessed by the DSU.

4.2.2

Debug communication link

The SpaceWire-RTC device includes a debug support unit communication link that con-

sists of a UART connected to the AHB bus as a master. The debug communications link

implements a simple read/write protocol and uses standard asynchronous UART com-

munications. The simple communication protocol is supported to transmit access

parameters and data.

A link command consists of a control byte, followed by a 32-bit address, followed by

optional write data.

4.3

LEON2-FT Peripherals

The AT7913E SpaceWire-RTC includes all the standard LEON2-FT peripherals.

4.3.1

Interrupt Controller

The Interrupt Controller is used to priorities and propagate interrupt requests from inter-

nal or external devices to the integer unit. 15 interrupts are handled, divided on two

priority levels.

A Secondary Interrupt Controller is included to support the 32 additional interrupts used

by the additional on-chip peripherals of the AT7913E device.

4.3.2

32-bit Timer

The timer unit implements two 32-bit timers, one 32-bit watchdog and one 10-bit shared

prescaler. The functionality of the timers has not been modified with respect to existing

implementations, to allow for software compatibility.

The watchdog functionality is used for overall software timeout handling and is the basis

for error management.