4

9128D–RKE–01/09

ATA5749 [Preliminary]

3.

Functional Description

3.1

Fractional-N PLL

The ATA5749 block diagram is shown in Figure 1-1 on page 2. The operation of the PLL is

determined by the contents of a 32-bit configuration register. The 15-bit value FREQ is used with

the 1-bit 434_N315 flag to determine the RF carrier frequency. This results in a user-selectable

frequency step size of 793 Hz (with 13.000 MHz crystal). With this level of resolution, it is possi-

ble to compensate for crystal tolerance by adjusting the value of FREQ accordingly. This

enables the use of lower cost crystals without compromising final accuracy. In addition, software

programming of RF carrier frequency allows this device to be used in some multi-channel

applications.

Modulation type is selected with the 1-bit ASK_NFSK flag. FSK modulation is achieved by mod-

ifying the divider block in the feedback loop. The benefit to this approach is that performance-

reducing RF spurs (common in applications that create FSK by “pulling” the load capacitance in

the crystal oscillator circuit) are completely eliminated. The 8-bit value FSEP establishes the

FSK frequency deviation. It is possible to obtain FSK frequency deviations from ±396 Hz to

±101 KHz in steps of ±396 Hz.

The PLL lock time is 1280/(external crystal frequency) and amounts to 98.46 µs when using a

13.0000 MHz crystal. When added to the crystal oscillator start-up time, a very fast

time-to-transmit is possible (typically 300 µs). This feature extends battery life in applications like

Tire Pressure Monitoring Systems, where the message length is often shorter than 10 ms and

the time “wasted” during start-up and settling time becomes more significant.

3.2

Selecting the RF Carrier Frequency

The fractional divider can be programmed to generate an RF output frequency f

the formulas shown in Table 3-1. Note that in the case of f

down to the next integer value if FSEP is an odd number.

FSEP can take on the values of 1 to 255. Using a 13.000 MHz crystal, the range of frequency

deviation f

example, with FSEP = 100 the output frequency is FSK modulated with f

FREQ can take values in the range of values 2500 and 22000. Using a 13.0000 MHz crystal, the

output frequency f

FSEP[0:7] = 100 and S434_N315 = 0. By setting FREQ[0:14] = 14342, FSEP[0:7] = 100 and

S434_N315 = 1, 433.92 MHz can be realized.

Table 3-1.

RF Output Parameter Formulas

RF Output Parameter

S434_N315 = LOW

S434_N315 = HIGH

(24 + (FREQ + 0.5)/16384)

× f

XTO

(32.5 + (FREQ + 0.5)/16384)

× f

XTO

(24 + (FREQ + FSEP + 0.5)/16384)

× f

XTO

(32.5 + (FREQ + FSEP + 0.5)/16384)

× f

XTO

f

DEV__FSK

FSEP/32768

× f

XTO

FSEP/32768

× f

XTO

(24 + (FREQ + FSEP/2 + 0.5)/16384)

× f

XTO

(32.5 + (FREQ + FSEP/2 + 0.5)/16384)

× f

XTO