HMD16M64B8A-F10 datasheet(6/10 Pages) HANBIT

Part #	HMD16M64B8A-F10

Description	Synchronous DRAM Module 128Mbyte (16Mx64-Bit), SO-DIMM, 4Banks, 4K Ref., 3.3V

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Manufacturer	HANBIT [Hanbit Electronics Co.,Ltd]

Direct Link	http://www.hbe.co.kr

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HANBit

HSD16M64B8A

URL:www.hbe.co.kr

HANBit Electronics Co.,Ltd.

REV 1.0 (August.2002)

- 6 -

ICC2NS

CKE

≥ VIH(min)

CLK

≤ VIL(max), tCC=∞

Input signals are stable

7

ICC3P

CKE

≤ VIL(max), tCC=10ns

5

Active standby current in

power-down mode

ICC3PS

CKE&CLK

≤ VIL(max)

tCC=

∞

5

mA

ICC3N

CKE

≥VIH(min),

CS*

≥VIH(min), tCC=10ns

Input signals are changed

one time during 20ns

30

Active standby current in

non power-down mode

(One bank active)

ICC3NS

CKE

≥VIH(min)

CLK

≤VIL(max), tCC=∞

Input signals are stable

20

mA

Operating current

(Burst mode)

ICC4

IO = 0 mA

Page burst

4Banks Activated

tCCD = 2CLKs

15

0

145

125

mA

1

Refresh current

ICC5

tRC

≥ tRC(min)

22

0

220

210

mA

2

1.5

mA

Self refresh current

ICC6

CKE

≤ 0.2V

800

mA

Notes:

1. Measured with outputs open.

2. Refresh period is 64ms.

3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).

AC OPERATING TEST CONDITIONS

(vcc = 3.3V

± 0.3V, TA = 0 to 70° C)

PARAMETER

Value

UNIT

AC Input levels (Vih/Vil)

2.4/0.4

V

Input timing measurement reference level

1.4

V

Input rise and fall time

tr/tf = 1/1

ns

Output timing measurement reference level

1.4

V

Output load condition

See Fig. 2

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