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5962R0922501VXC Datasheet(PDF) 10 Page - Intersil Corporation |
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5962R0922501VXC Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 16 page 10 FN6947.0 December 15, 2009 slowly ramping the output voltage. Once the commanded output voltage is within the proper window of operation, the power-good signal changes state from low to high indicating proper regulator operation. Power-On Reset The POR circuitry prevents the controller from attempting to soft-start before sufficient bias is present at the PVINx pins. The POR threshold of the PVINx pins is controlled by the PORSEL pin. For a nominal 5V supply voltage, PORSEL should be connected to DVDD. For a nominal 3.3V supply voltage, PORSEL should be connected to DGND. For nominal supply voltages between 5V and 3.3V, PORSEL should be connected to DGND. The POR rising and falling thresholds are shown in the “Electrical Specifications” table on page 8. Hysteresis between the rising and falling thresholds insures that small perturbations on PVINx seen during turn-on/turn-off of the regulator do not cause inadvertent turn-off/turn-on of the regulator. When the PVINx pins are below the POR rising threshold, the internal synchronous power MOSFET switches are turned off and the LXx pins are held in a high-impedance state. Enable and Disable After the POR input requirement is met, the ISL70001SRH remains in shutdown until the voltage at the enable input rises above the enable threshold. As shown in Figure 5, the enable circuit features a comparator type input. In addition to simple logic on/off control, the enable circuit allows the level of an external voltage to precisely gate the turn-on/turn-off of the regulator. An internal IEN current sink with a typical value of 11µA is only active when the voltage on the EN pin is below the enable threshold. The current sink pulls the EN pin low. As VIN2 rises, the enable level is not set exclusively by the resistor divider from VIN2. With the current sink active, the enable level is defined by Equation 4. R1 is the resistor from the EN pin to VIN2 and R2 is the resistor from the EN pin to the AGND pin. Once the voltage at the EN pin reaches the enable threshold, the IEN current sink turns off. With the part enabled and the IEN current sink off, the disable level is set by the resistor divider. The disable level is defined by Equation 5. The difference between the enable and disable levels provides adjustable hysteresis so that noise on VIN2 does not interfere with the enabling or disabling of the regulator. The EN pin should be bypassed to the AGND pin with a 10nF ceramic capacitor to mitigate SEE. Soft-Start Once the POR and enable circuits are satisfied, the regulator initiates a soft-start. Figure 6 shows that the soft-start circuit clamps the error amplifier reference voltage to the voltage on an external soft-start capacitor connected to the SS pin. The soft-start capacitor is charged by an internal ISS current source. As the soft-start capacitor is charged, the output voltage slowly ramps to the set point determined by the reference voltage and the feedback network. Once the voltage on the SS pin is equal to the internal reference voltage, the soft-start interval is complete. The controlled ramp of the output voltage reduces the inrush current during start-up. The soft-start output ramp interval is defined in Equation 6 and is adjustable from approximately 2ms to 200ms. The value of the soft-start capacitor, CSS, should range from 8.2nF to 8.2µF, inclusive. The peak inrush current can be computed from Equation 7. The soft-start interval should be selected long enough to insure that the peak inrush current plus the peak output load current does not exceed the overcurrent trip level of the regulator. The soft-start capacitor is immediately discharged by a 2.2Ω resistor whenever POR conditions are not met or EN is pulled low. The soft-start discharge time is equal to 256 clock cycles. V ENABLE V R 1 R1 R2 -------- + ⋅ I EN R1 ⋅ + = (EQ. 4) V DISABLE V R 1 R1 R2 -------- + ⋅ = (EQ. 5) FIGURE 5. ENABLE CIRCUIT - + VR EN PVINx VIN1 POR LOGIC VIN2 R1 R2 IEN ENABLE COMPARATOR CEN VR = 0.6V IEN = 11µA CEN = 10nF t SS C SS V REF I SS --------------- ⋅ = (EQ. 6) I INRUSH C OUT V OUT t SS ---------------- ⋅ = (EQ. 7) ISL70001SRH |
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