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NB6L14SMNG Datasheet(PDF) 4 Page - ON Semiconductor

Part # NB6L14SMNG
Description  2.5 V 1:4 AnyLevel??Differential Input to LVDS Fanout Buffer/Translator
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB6L14SMNG Datasheet(HTML) 4 Page - ON Semiconductor

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NB6L14S
http://onsemi.com
4
Table 5. DC CHARACTERISTICS VCC = 2.375 V to 2.625 V, GND = 0 V, TA = −40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
ICC
Power Supply Current (Note 9)
65
100
mA
DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Figures 17, 18, 22, and 24)
Vth
Input Threshold Reference Voltage Range (Note 8)
GND +100
VCC − 100
mV
VIH
Single−ended Input HIGH Voltage
Vth + 100
VCC
mV
VIL
Single−ended Input LOW Voltage
GND
Vth − 100
mV
VREFAC
Reference Output Voltage (Note 11)
VCC − 1.600 VCC − 1.425 VCC − 1.300
V
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 10, 12, NO TAG, NO TAG, 23, and 25)
VIHD
Differential Input HIGH Voltage
100
VCC
mV
VILD
Differential Input LOW Voltage
GND
VIHD − 100
mV
VCMR
Input Common Mode Range (Differential Configuration)
GND + 50
VCC − 50
mV
VID
Differential Input Voltage (VIHD − VILD)
100
VCC
mV
RTIN
Internal Input Termination Resistor
40
50
60
W
LVDS OUTPUTS (Note 5)
VOD
Differential Output Voltage
250
450
mV
DVOD
Change in Magnitude of VOD for Complementary Output States
(Note 10)
0
1
25
mV
VOS
Offset Voltage (Figure 21)
1125
1375
mV
DVOS
Change in Magnitude of VOS for Complementary Output States
(Note 10)
0
1
25
mV
VOH
Output HIGH Voltage (Note 6)
1425
1600
mV
VOL
Output LOW Voltage (Note 7)
900
1075
mV
LVTTL/LVCMOS INPUT, EN
VIH
Input HIGH Voltage
2.0
VCC
V
VIL
Input LOW Voltage
GND
0.8
V
IIH
Input HIGH Current
−150
150
mA
IIL
Input LOW Current
−150
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. LVDS outputs require 100 W receiver termination resistor between differential pair. See Figure 20.
6. VOHmax = VOSmax + ½ VODmax.
7. VOLmax = VOSmin − ½ VODmax.
8. Vth is applied to the complementary input when operating in single−ended mode.
9. Input termination pins open at the DC level within VCMR and output pins loaded with RL = 100 W across differential.
10.Parameter guaranteed by design verification not tested in production.
11. VREFAC used to rebias capacitor−coupled inputs only (see Figures 17 and 18).


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