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71M6531D Datasheet(PDF) 1 Page - Teridian Semiconductor Corporation |
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71M6531D Datasheet(HTML) 1 Page - Teridian Semiconductor Corporation |
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1 / 115 page  71M6531D/F, 71M6532D/F Energy Meter IC Simplifying System Integration TM DATA SHEET October 2009 v1.2 © 2005-2009 TERIDIAN Semiconductor Corporation 1 GENERAL DESCRIPTION The Teridian 71M6531D/F and 71M6532D/F are highly inte- grated SOCs with an MPU core, RTC, FLASH and LCD driver. Teridian’s patented Single Converter Technology® with a 22-bit delta-sigma ADC, four analog inputs, digital temperature com- pensation, precision voltage reference, battery voltage monitor and 32-bit computation engine (CE) supports a wide range of residential metering applications with very few low-cost external components. A 32-kHz crystal time base for the entire system and internal bat- tery backup support for RAM and RTC further reduce system cost. The IC supports 2-wire, and 3-wire single-phase and dual-phase residential metering along with tamper-detection mechanisms. The 71M6531D/F offers single-ended inputs for two current channels and two single-ended voltage inputs. The 71M6532D/F has two differential current inputs and three sin- gle-ended voltage inputs. Maximum design flexibility is provided by multiple UARTs, I 2C, μWire, up to 21 DIO pins and in-system programmable FLASH memory, which can be updated with data or application code in operation. A complete array of ICE and development tools, programming libraries and reference designs enable rapid development and certification of TOU, AMR and Prepay meters that comply with worldwide electricity metering standards. FEATURES • Wh accuracy < 0.1% over 2000:1 current range • Exceeds IEC62053/ANSI C12.20 standards • Four sensor inputs • Low-jitter Wh and VARh plus two additional pulse test outputs (4 total, 10 kHz maximum) with pulse count • Four-quadrant metering • Tamper detection (Neutral current with CT, Rogowski or shunt, magnetic tamper input) • Line frequency count for RTC • Digital temperature compensation • Sag detection for phase A and B • Independent 32-bit compute engine • 46-64 Hz line frequency range with same calibration. Phase compensation ( ± 7°) • Three battery modes with wake-up on timer or push-button: Brownout mode (52 µA typ.) LCD mode (21 µA typ., DAC active) Sleep mode (0.7 µA typ.) • Energy display during mains power failure • 39 mW typical consumption @ 3.3 V, MPU clock frequency 614 kHz • 22-bit delta-sigma ADC with 3360 Hz or 2520 Hz sample rate • 8-bit MPU (80515), 1 clock cycle per in- struction, 10 MHz maximum, with integrated ICE for debug • RTC for TOU functions with clock-rate adjust register • Hardware watchdog timer, power fail monitor • LCD driver with 4 common segment drivers: Up to 156 (71M6531D/F) or 268 pixels (71M6532D/F) • Up to 22 (71M6531D/F) or 43 (71M6532D/F) general-purpose I/O pins. Digital I/O pins compatible with 5 V inputs • 32 kHz time base • High-speed slave SPI interface to data RAM • Two UARTs for IR and AMR, IR driver with modulation • FLASH memory with security and in-system program update: 128 KB (71M6531D/32D) 256 KB (71M6531F/32F) • 4 KB MPU XRAM • Industrial temperature range • 68-pin QFN package for 71M6531D/F pin- compatible with 71M6521, 100-pin LQFP package for 71M6532D/F, lead free MPU TIMERS IAP* VA IBP* XIN XOUT VREF RX/DIO1 TX/DIO2 V1 TX RX COM0..3 V3.3A V3.3 SYS VBAT V2.5 VBIAS GNDA GNDD SEG/DIO ICE I/F LOAD 88. 88. 8888 I2C or µWire EEPROM POWER FAULT AMR TEST PULSES COMPARATOR SENSE DRIVE/MOD SERIAL PORTS OSC/PLL ADC LCD & DIO COMPUTE ENGINE FLASH MEMORY RAM VOLTAGE REF REGULATOR POWER SUPPLY TERIDIAN 71M6531 71M6532 TEMP SENSOR 32 kHz A NEUTRAL CT/SHUNT 02/18/2009 VB B LOAD IR PWR MODE CONTROL WAKE-UP BATTERY ICE_E GNDD V3P3D IAN* IBN* CT SPI HOST SPI LCD SEG RTC * Differential pins only on 6532D/F |
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