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PEX8649 Datasheet(PDF) 4 Page - PLX Technology

Part # PEX8649
Description  PCI Express Gen 2 Switch, 48 Lanes, 12 Ports
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Manufacturer  PLX [PLX Technology]
Direct Link  http://www.plxtech.com
Logo PLX - PLX Technology

PEX8649 Datasheet(HTML) 4 Page - PLX Technology

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PEX 8649, PCI Express Gen 2 Switch, 48 Lanes, 12 Ports
Applications
Suitable for host-centric as well as peer-to-peer traffic
patterns, the PEX 8649 can be configured for a wide
variety of form factors and applications.
Host Centric Fan-out
The PEX 8649, with its symmetric or asymmetric lane
configuration capability, allows user-specific tuning to a
variety of host-centric applications. Figure 6 shows a
server design where, in a quad or multi processor system,
users can assign endpoints/slots to CPU cores to distribute
the system load. The packets directed to different CPU
cores will go to different (user assigned) PEX 8649
upstream ports, allowing better queuing and load balancing
capability for higher performance. Conversely, the PEX
8649 can also be used in single-host mode to simply fan-
out to endpoints.
Figure 6. Host Centric Dual Upstream
Multi-Host Systems
In multi-host mode, the PEX 8649 can be shared by up to
four hosts in a system. By creating four virtual switches,
the PEX 8649 allows four hosts to fan-out to their
respective endpoints. This reduces the number of switches
required for fan-out, saving precious board space and
power consumption. In Figure 7, the PEX 8649 is being
shared by four different servers (hosts) with each server is
running its own applications (I/Os). The PEX 8649 assigns
the endpoints to the appropriate host and isolates them
from the other hosts.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Chip
Set
Chip
Set
CPU
CPU
Chip
Set
Chip
Set
CPU
CPU
CPU
CPU
Chip
Set
Chip
Set
CPU
CPU
Chip
Set
Chip
Set
CPU
CPU
CPU
CPU
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Chip
Set
Chip
Set
CPU
CPU
Chip
Set
Chip
Set
CPU
CPU
CPU
CPU
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PEX 8649
PEX 8649
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Chip
Set
Chip
Set
CPU
CPU
Chip
Set
Chip
Set
CPU
CPU
CPU
CPU
Figure 7. Multi-Host System
Host Failover
The PEX 8649 can also be utilized in applications where
host failover is required. In the below application (Figure
8), two hosts may be active simultaneously and controlling
their own domains while exchange status information
through doorbell registers or I
2C interface. The devices can
be programmed to trigger fail-over if the heartbeat
information is not provided. In the event of a failure, the
surviving device will reset the endpoints connected to the
failing CPU and enumerate them in its own domain
without impacting the operation of endpoints already in its
domain.
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
x8
x4 & x8
Chipset
Chipset
Chipset
Chipset
PEX 8649
PEX 8649
PEX 8649
PEX 8649
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
x8
Chipset
Chipset
Chipset
Chipset
PEX 8649
PEX 8649
PEX 8649
PEX 8649
x8s
Figure 8. Host Fail-Over
N+1 Fail-Over in Storage Systems
The PEX 8649’s Multi-Host feature can also be used to
develop storage array clusters where each host manages a
set of storage devices independent of others (Figure 9).
Users can designate one of the hosts as the failover-host
for all the other hosts while actively managing its own
endpoints. The failover-host will communicate with other
hosts for status/heartbeat information and execute a
failover event if/when it gets triggered.
© PLX Technology, www.plxtech.com
Page 4 of 4
5/14/2009, Version 1.1


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