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MCF51AC256BVFUE Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc |
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MCF51AC256BVFUE Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 46 page  MCF51AC256 Family Configurations MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.4 Freescale Semiconductor 7 — 24 analog inputs with 12 bits resolution — Output formatted in 12-, 10- or 8-bit right-justified format — Single or continuous conversion (automatic return to idle after single conversion) — Operation in low-power modes for lower noise operation — Asynchronous clock source for lower noise operation — Automatic compare with interrupt for less-than, or greater-than or equal-to, programmable value — On-chip temperature sensor • Flexible timer/pulse-width modulators (FTM) — 16-bit Free-running counter or a counter with initial and final value. The counting can be up and unsigned, up and signed, or up-down and unsigned — Up to 6 channels, and each channel can be configured for input capture, output compare or edge-aligned PWM mode, all channels can be configured for center-aligned PWM mode – Channels can operate as pairs with equal outputs, pairs with complimentary outputs or independent channels (with independent outputs) – Each pair of channels can be combined to generate a PWM signal (with independent control of both edges of PWM signal) – Deadtime insertion is available for each complementary pair — The load of the FTM registers which have write buffer can be synchronized; write protection for critical registers — Generation of the triggers to ADC (hardware trigger) — A fault input for global fault control — Backwards compatible with TPM • Timer/pulse width modulator (TPM) — 16-bit free-running or modulo up/down count operation — Two channels, each channel may be input capture, output compare, or edge-aligned PWM — One interrupt per channel plus terminal count interrupt • Cyclic redundancy check (CRC) generator — High speed hardware CRC generator circuit using 16-bit shift register — CRC16-CCITT compliancy with x16 + x12 + x5 + 1 polynomial — Error detection for all single, double, odd, and most multi-bit errors — Programmable initial seed value • Analog comparators (ACMP) — Full rail to rail supply operation — Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator output — Option to compare to fixed internal bandgap reference voltage — Option to allow comparator output to be visible on a pin, ACMPxO • Inter-integrated circuit (IIC) — Compatible with IIC bus standard |
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Similar Description - MCF51AC256BVFUE |
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