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MCF51AC256BCLKE Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MCF51AC256BCLKE Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
5 / 46 page MCF51AC256 Family Configurations MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.4 Freescale Semiconductor 5 1.3 Features Table 2 describes the functional units of the MCF51AC256 series. Table 2. MCF51AC256 Series Functional Units Functional Unit Function CF1 Core (V1 ColdFire core) Executes programs and interrupt handlers BDM (background debug module) Provides single pin debugging interface (part of the V1 ColdFire core) DBG (debug) Provides debugging and emulation capabilities (part of the V1 ColdFire core) VBUS (debug visibility bus) Allows for real-time program traces (part of the V1 ColdFire core) SIM (system integration module) Controls resets and chip level interfaces between modules Flash (flash memory) Provides storage for program code, constants and variables RAM (random-access memory) Provides storage for program variables RGPIO (rapid general-purpose input/output) Allows for I/O port access at CPU clock speeds VREG (voltage regulator) Controls power management across the device COP (computer operating properly) Monitors a countdown timer and generates a reset if the timer is not regularly reset by the software LVD (low-voltage detect) Monitors internal and external supply voltage levels, and generates a reset or interrupt when the voltages are too low CF1_INTC (interrupt controller) Controls and prioritizes all device interrupts ADC (analog-to-digital converter) Measures analog voltages at up to 12 bits of resolution FTM1, FTM2 (flexible timer/pulse-width modulators) Provides a variety of timing-based features TPM3 (timer/pulse-width modulator) Provides a variety of timing-based features CRC (cyclic redundancy check) Accelerates computation of CRC values for ranges of memory ACMP1, ACMP2 (analog comparators) Compares two analog inputs IIC (inter-integrated circuit) Supports standard IIC communications protocol KBI (keyboard interrupt) Provides pin interrupt capabilities MCG (multipurpose clock generator) Provides clocking options for the device, including a phase-locked loop (PLL) and frequency-locked loop (FLL) for multiplying slower reference clock sources OSC (crystal oscillator) Allows a crystal or ceramic resonator to be used as the system clock source or reference clock for the PLL or FLL CAN (controller area network) Supports standard CAN communications protocol SCI1, SCI2 (serial communications interfaces) Serial communications UARTs capable of supporting RS-232 and LIN protocols SPI1 (8-bit serial peripheral interfaces) Provides 8-bit 4-pin synchronous serial interface SPI2 (16-bit serial peripheral interfaces) Provides 16-bit 4-pin synchronous serial interface with FIFO |
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