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MCIMX31LCJMN4D Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc

Part # MCIMX31LCJMN4D
Description  Multimedia Applications Processors for Industrial and Automotive Products
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
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Signal Descriptions
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.2
Freescale Semiconductor
9
3
Signal Descriptions
Signal descriptions are in the reference manual. Special signal considerations are listed following this
paragraph. The BGA ball assignment is in Section 5, “Package Information and Pinout,” on page 99.
Special Signal Considerations:
Tamper detect (GPIO1_6)
Tamper detect logic is used to issue a security violation. This logic is activated if the tamper detect
input is asserted.
The tamper detect logic is disabled after reset. After enabling the logic, it is impossible to disable
it until the next reset. The GPR[16] bit functions as the tamper detect enable bit.
GPIO1_6 functions similarly to other I/O with GPIO capabilities regardless of the status of the
tamper detect enable bit. (For example, the GPIO1_6 can function as an input with GPIO
capabilities, such as sampling through PSR or generating interrupts.)
Power ready (GPIO1_5)
The power ready input, GPIO1_5, should be connected to an external power management IC power
ready output signal. If not used, GPIO1_5 must either be (a) externally pulled-up to NVCC1 or (b)
a no connect, internally pulled-up by enabling the on-chip pull-up resistor. GPIO1_5 is a dedicated
input and cannot be used as a general-purpose input/output.
SJC_MOD
SJC_MOD must be externally connected to GND for normal operation. Termination to GND
through an external pull-down resistor (such as 1 k
Ω) is allowed, but the value should be much
smaller than the on-chip 100 k
Ω pull-up.
CE_CONTROL
CE_CONTROL is a reserved input and must be externally tied to GND through a 1 k
Ω resistor.
M_REQUEST and M_GRANT
These two signals are not utilized internally. The user should make no connection to these signals.
Clock Source Select (CLKSS)
The CLKSS is the input that selects the default reference clock source providing input to the DPLL.
To select CKIH, tie CLKSS to NVCC1. To select CKIL, tie CLKSS to ground. After initialization,
the reference clock source can be changed (initial setting is overwritten) by programming the
PRCS bits in the CCMR.
4
Electrical Characteristics
This section provides the device-level and module-level electrical characteristics for the MCIMX31C.
4.1
Chip-Level Conditions
This section provides the device-level electrical characteristics for the IC. See Table 4 for a quick reference
to the individual tables and sections.


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