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HT46R73D-1A Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT46R73D-1A Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
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5 / 44 page  Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions IOH2 LCD Common and Segment Current 3V VOH=0.9VDD -80 -160 ¾mA 5V -180 -360 ¾mA RPH Pull-high Resistance of I/O Ports 3V ¾ 20 60 100 k W 5V ¾ 10 30 50 k W Charge Pump and Regulator VCHPI Input Voltage ¾ Charge pump on 2.2 ¾ 3.6 V Charge pump off 3.7 ¾ 5.5 V VREGO Output Voltage ¾ No load 3 3.3 3.6 V VREGDP1 Regulator Output Voltage Drop (Compare with No Load) ¾ VDD=3.7V~5.5V Charge pump off Current £10mA ¾ 100 ¾ mV VREGDP2 ¾ VDD=2.4V~3.6V Charge pump on Current £6mA ¾ 100 ¾ mV Dual Slope AD, Amplifier and Band Gap VRFGO Reference Generator Output ¾ @3.3V 1.45 1.5 1.55 V VRFGTC Reference Generator Temperature Coefficient ¾ @3.3V ¾ 50 ¾ Ppm/C VADOFF Input Offset Range ¾¾ ¾ 500 800 mV VICMR Common Mode Input Range ¾ Amplifier, no load 0.2 ¾ VREGO -1 V ¾ Integrator, no load 1 ¾ VREGO-0.2 V A.C. Characteristics Ta=25 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fSYS System Clock (RC OSC) ¾ 2.2V~5.5V 400 ¾ 4000 kHz System Clock (Crystal OSC) ¾ 2.2V~5.5V 400 ¾ 4000 kHz ¾ 3.3V~5.5V 400 ¾ 8000 kHz fINRC Internal RC OSC 3V ¾ ¾ 12 ¾ kHz 5V ¾ 15 ¾ kHz fTIMER Timer I/P Frequency (TMR0/TMR1) ¾ 2.2V~5.5V 0 ¾ 4000 kHz tWDTOSC Watchdog Oscillator Period 3V ¾ 45 90 180 ms 5V ¾ 32 65 130 ms tRES External Reset Low Pulse Width ¾¾ 1 ¾¾ ms tSST System Start-up Timer Period ¾ Power-up or wake-up from HALT ¾ 1024 ¾ tSYS tLVR Low Voltage Width to Reset ¾¾ 0.25 1 2 ms tINT Interrupt Pulse Width ¾¾ 1 ¾¾ ms Note: tSYS= 1/fSYS HT46R73D-1A Rev. 1.00 5 June 25, 2008 |
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