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HT82A520R Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT82A520R Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
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4 / 72 page  Pin Description HT82A520R Pin Name I/O Options Description PA0/SCS PA1/SCK PA2/SDI PA3/SDO PA4/PWM0 PA5/PWM1 PA6/INT PA7/TMR I/O Pull-high Wake-up NMOS or CMOS Bidirectional 8-bit input/output port. Each pin can be configured as a wake-up input by a configuration option. Software instructions determine if the pin is output or Schmitt Trigger input. When if output, Configuration op- tion may choose CMOS or NMOS. Configuration options determine if the pins have pull-high resistors. The INT and TMR pins are pin-shared with PA6 and PA7, respectively. PA0~PA3 are shared with the SPI function. PA4~PA5 are shared with PWM0~PWM1. PB0/PWM2 PB1~PB7 I/O Pull-high Wake-up PB7: I/O or VDDIO PB0~PB6 power: from VDD or VDDIO Bi-directional 8-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options deter- mine if the pins have pull-high resistors. A configuration option determines whether PB7 is an I/O pin or a power supply pin for PB0~PB6. A configuration option determines whether the power supply for PB0~PB6 is sourced from VDD or VDDIO. PB0 shared with PWM2. PC0~PC7 I/O Pull-high Wake-up Bi-directional 8-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options deter- mine if the pins have pull-high resistors. OSCI OSCO I O ¾ OSCI, OSCO are connected to an 6MHz or 12MHz Crystal/resonator (de- termined by software instructions) for the internal system clock RES I ¾ Schmitt Trigger reset input, active low VDD ¾¾ Positive power supply D-/Data I/O ¾ USBD- line The USB function is controlled by software control registers D+/CLK I/O ¾ USBD+ line The USB function is controlled by software control registers V33O O ¾ 3.3V regulator output VSS ¾¾ Negative power supply, ground HT82A520R/HT82A620R Rev.1.00 4 October 23, 2009 |
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