Pad Assignment

Chip size: 92

´ 89 (mil)

2

Bump height: 18

mm ± 3mm

Min. Bump spacing: 23.102

mm

Bump size: 76

´ 76mm

2

* The IC substrate should be connected to VDD in the PCB layout artwork.

HT1620

Rev. 1.80

3

July 27, 2009

PATENTED

2 8

2 9

3 0

3 1

3 2

3 3

3 4

3 5

3 6

3 7

3 8

3 9

( 0 , 0 )

C C 2

V O 1 5 N

V E E

C O M 0

C O M 1

C O M 2

C O M 3

S E G 0

S E G 1

S E G 2

S E G 3

S E G 4

S E G 5

S E G 3 1

S E G 3 0

S E G 2 3

S E G 2 4

S E G 2 5

S E G 2 6

S E G 2 7

S E G 2 8

S E G 2 9

S E G 2 0

S E G 2 1

S E G 2 2

1

4

5

6

7

8

9

1 0

1 1

1 2

1 3

5 1

2 7

1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6

4 0

4 1

4 2

4 3

4 4

4 5

4 6

4 7

4 8

4 9

5 0

3

2