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LTC2170IUKG-12PBF Datasheet(PDF) 6 Page - Linear Technology |
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LTC2170IUKG-12PBF Datasheet(HTML) 6 Page - Linear Technology |
6 / 34 page LTC2172-12/ LTC2171-12/LTC2170-12 6 21721012fa TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS LTC2172-12 LTC2171-12 LTC2170-12 UNITS MIN TYP MAX MIN TYP MAX MIN TYP MAX fS Sampling Frequency (Notes 10, 11) l 5 65 5 40 5 25 MHz tENCL ENC Low Time (Note 8) Duty Cycle Stabilizer Off Duty Cycle Stabilizer On l l 7.3 2 7.69 7.69 100 100 11.88 2 12.5 12.5 100 100 19 2 20 20 100 100 ns ns tENCH ENC High Time (Note 8) Duty Cycle Stabilizer Off Duty Cycle Stabilizer On l l 7.3 2 7.69 7.69 100 100 11.88 2 12.5 12.5 100 100 19 2 20 20 100 100 ns ns tAP Sample-and-Hold Acquisition Delay Time 000 ns POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS LTC2172-12 LTC2171-12 LTC2170-12 UNITS MIN TYP MAX MIN TYP MAX MIN TYP MAX VDD Analog Supply Voltage (Note 10) l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V OVDD Output Supply Voltage (Note 10) l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V IVDD Analog Supply Current Sine Wave Input l 154 177 94 111 74 83 mA IOVDD Digital Supply Current 1-Lane Mode, 1.75mA Mode 1-Lane Mode, 3.5mA Mode 2-Lane Mode, 1.75mA Mode 2-Lane Mode, 3.5mA Mode l l 16 30 25 47 28 50 16 29 24 46 27 50 15 28 24 45 26 49 mA mA mA mA PDISS Power Dissipation 1-Lane Mode, 1.75mA Mode 1-Lane Mode, 3.5mA Mode 2-Lane Mode, 1.75mA Mode 2-Lane Mode, 3.5mA Mode l l 306 331 322 362 369 409 198 221 212 252 248 290 160 184 176 214 196 238 mW mW mW mW PSLEEP Sleep Mode Power 1 1 1 mW PNAP Nap Mode Power 75 75 75 mW PDIFFCLK Power Increase with Differential Encode Mode Enabled (No Increase for Sleep Mode) 20 20 20 mW |
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