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ATH006A0X Datasheet(PDF) 10 Page - Lineage Power Corporation |
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ATH006A0X Datasheet(HTML) 10 Page - Lineage Power Corporation |
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10 / 19 page  Data Sheet June 24, 2008 Austin MicroLynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.63Vdc Output; 6A output current LINEAGE POWER 10 Test Configurations TO OSCILLOSCOPE CURRENT PROBE LTEST 1μH CS 1000μF Electrolytic E.S.R.<0.1 Ω @ 20°C 100kHz 2x100μF Tantalum VIN(+) COM NOTE: Measure input reflected ripple current with a simulated source inductance (LTEST) of 1μH. Capacitor CS offsets possible battery impedance. Measure current as shown above. CIN Figure 23. Input Reflected Ripple Current Test Setup. NOTE: All voltage measurements to be taken at the module terminals, as shown above. If sockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance. VO(+) COM 1uF . RESISTIVE LOAD SCOPE COPPER STRIP GROUND PLANE 10uF Figure 24. Output Ripple and Noise Test Setup. VO COM VIN(+) COM RLOAD Rcontact Rdistribution Rcontact Rdistribution Rcontact Rcontact Rdistribution Rdistribution VIN VO NOTE: All voltage measurements to be taken at the module terminals, as shown above. If sockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance. Figure 25. Output Voltage and Efficiency Test Setup. η = VO. IO VIN. IIN x 100 % Efficiency Design Considerations Input Filtering The Austin MicroLynx TM II SIP module should be connected to a low-impedance source. A highly inductive source can affect the stability of the module. An input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage and ensure module stability. To minimize input voltage ripple, low-ESR polymer and ceramic capacitors are recommended at the input of the module. Figure 26 shows the input ripple voltage (mVp-p) for various outputs with 1x150 µF polymer capacitors (Panasonic p/n: EEFUE0J151R, Sanyo p/n: 6TPE150M) in parallel with 1 x 47 µF ceramic capacitor (Panasonic p/n: ECJ-5YB0J476M, Taiyo- Yuden p/n: CEJMK432BJ476MMT) at full load. Figure 27 shows the input ripple with 2x150 µF polymer capacitors in parallel with 2 x 47 µF ceramic capacitor at full load. 0 20 40 60 80 100 120 0 1 234 Vin = 3.3V Vin = 5.0V Output Voltage (Vdc) Figure 26. Input ripple voltage for various output with 1x150 µF polymer and 1x47 µF ceramic capacitors at the input (80% of Io,max). 0 20 40 60 80 100 120 01 2 3 4 Vin = 3.3V Vin = 5.0V Output Voltage (Vdc) Figure 27. Input ripple voltage for various output with 2x150 µF polymer and 2x47 µF ceramic capacitors at the input (80% of Io,max). |
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