2.2MHz, Dual, Step-Down DC-DC

Converters, Dual LDOs, and

RESET

10

______________________________________________________________________________________

Pin Description (continued)

PIN

TQFN

TSSOP

NAME

FUNCTION

8

10

OUTS2

OUT2 Voltage Sense Input. Connect OUTS2 directly to the OUT2 output voltage and

bypass to PGND2 with a minimum total capacitance of 10µF. The total capacitance can

include input bypass capacitors cascaded from OUT2, discharged by a 70

Ω resistance

between OUTS2 and PGND2 when disabled.

9

11

PGND2

Power Ground for BUCK 2. Connect PGND2 and GND_ together near the device.

10

12

LX2

Inductor Connection for OUT2. Connect a 2.2µH inductor between LX2 and OUT2 as shown

in the Functional Diagram.

11

13

PV2

OUT2 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV2 to ground.

12

14

PV3

Linear-Regulator Power Input for OUT3. Bypass PV3 to GND with a minimum 2.2µF ceramic

capacitor.

13

15

OUT3

Linear-Regulator 1 Output. Bypass OUT3 to GND with a minimum 2.2µF ceramic capacitor

internally discharged by a 1k

Ω resistance when disabled.

14

16

GND2

Ground. Connect GND, GND1, GND2, and GND3 together.

15

17

OUT4

Linear-Regulator 2 Output. Bypass OUT4 to GND with a minimum 2.2µF ceramic capacitor.

Internally discharged by a 1k

Ω resistance when disabled.

16

18

PV4

Linear-Regulator Power Input for OUT4. Bypass PV4 to GND with a minimum 2.2µF ceramic

capacitor.

17

19

LSUP

5V Logic Supply to Provide Power to Internal Circuitry. Bypass LSUP to GND1 with a 1µF

ceramic capacitor.

18

20

RESET

Open-Drain Reset Output for the Input Monitoring OUT1 and OUT2. External pullup

required.

19

1

GND1

Ground. Connect GND, GND1, GND2, and GND3 together.

20

2

EN

Active-High Enable Input. Connect EN to PV1 or a logic-high voltage to turn on all

regulators. Pull EN input low to place the regulators in shutdown.

——

EP

Exposed Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground

does not remove the requirement for proper ground connections to PGND2 and GND_. The

exposed pad is attached with epoxy to the substrate of the die, making it an excellent path

to remove heat from the device.