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ADC1413D080C1 Datasheet(PDF) 7 Page - NXP Semiconductors |
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ADC1413D080C1 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 38 page ADC1413D065_080_105_125_2 © NXP B.V. 2009. All rights reserved. Objective data sheet Rev. 02 — 4 June 2009 7 of 38 NXP Semiconductors ADC1413D065/080/105/125 Dual 14 bits ADC; 65, 80, 105 or 125 Msps P power dissipation power-down mode - 30 - mW standby mode - 200 - mW Digital inputs Clock inputs: pins CLKP and CLKM, AC coupled LVPECL, LVDS and Sinewave modes compatible Vi(clk)dif differential clock input voltage peak-to-peak 0.2 0.8 <tbd> V (p-p) LVCMOS mode VI input voltage 0.3VDDA - 0.7VDDA V Logic Inputs: Power-down: pin CF 0 to 3, pin scrambler, Swing_0, Swing_1 VIL LOW-level input voltage - 0 - V VIH HIGH-level input voltage - 0.66VDDD -V IIL LOW-level input current −6- +6 µA IIH HIGH-level input current −30 - +30 µA Serial Peripheral Interface: pin CSB, SDIO, SCLK, pin DFS, pin DCS VIL LOW-level input voltage 0 - 0.3VDDA V VIH HIGH-level input voltage 0.7VDDA -VDDA V IIL LOW-level input current −10 - +10 µA IIH HIGH-level input current −50 - +50 µA CI Input capacitance - 4 - pF Analog inputs: pins INAP and INAM, pins INBP and INBM II Input current −5- +5 µA RI input resistance - 15 - Ω CI input capacitance - 5 - pF VI(cm) common-mode input voltage 0.9 1.5 2 V Bi input bandwidth - 600 - MHz VI(dif) differential input voltage 1 - 2 V (p-p) Voltage controlled regulator output: pin VCMA, VCMB VO(cm) common-mode output voltage - 0.5VDDA -V IO(cm) common-mode output current - <tbd> - µA Table 5. Characteristics …continued Typical values measured at VDDA =3V, VDDD = 1.8 V, Tamb =25 °C and CL = 5 pF. Min. and max. values are across the full temperature range Tamb = −40 °C to +85 °C at VDDA = 3 V, VDDD = 1.8 V; Vi (INAP, INBP) − Vi (INAM, INBM) = −1 dBFS; internal reference mode; 100 Ω differential applied to serial outputs; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit |
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