 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ENC624J600 Datasheet(PDF) 3 Page - Microchip Technology |
|
||||||||||||||||||||||||||||||
ENC624J600 Datasheet(HTML) 3 Page - Microchip Technology |
|
|
3 / 168 page  2010 Microchip Technology Inc. DS39935C-page 1 ENC424J600/624J600 • IEEE 802.3™ Compliant Fast Ethernet Controller • Integrated MAC and 10/100Base-T PHY • Hardware Security Acceleration Engines • 24-Kbyte Transmit/Receive Packet Buffer SRAM • Supports one 10/100Base-T Port with Automatic Polarity Detection and Correction • Supports Auto-Negotiation • Support for Pause Control Frames, including Automatic Transmit and Receive Flow Control • Supports Half and Full-Duplex Operation • Programmable Automatic Retransmit on Collision • Programmable Padding and CRC Generation • Programmable Automatic Rejection of Erroneous and Runt Packets • Factory Preprogrammed Unique MAC Address •MAC: - Support for Unicast, Multicast and Broadcast packets - Supports promiscuous reception - Programmable pattern matching - Programmable filtering on multiple packet formats, including Magic Packet™, Unicast, Multicast, Broadcast, specific packet match, destination address hash match or any packet •PHY: - Wave shaping output filter - Internal Loopback mode - Energy Detect Power-Down mode • Available MCU Interfaces: - 14 Mbit/s SPI interface with enhanced set of opcodes (44-pin and 64-pin packages) - 8-bit multiplexed parallel interface (44-pin and 64-pin packages) - 8-bit or 16-bit multiplexed or demultiplexed parallel interface (64-pin package only) • Security Engines: - High-performance, modular exponentiation engine with up to 1024-bit operands - Supports RSA® and Diffie-Hellman key exchange algorithms - High-performance AES encrypt/decrypt engine with 128-bit, 192-bit or 256-bit key - Hardware AES ECB, CBC, CFB and OFB mode capability - Software AES CTR mode capability - Fast MD5 hash computations - Fast SHA-1 hash computations •Buffer: - Configurable transmit/receive buffer size - Hardware-managed circular receive FIFO - 8-bit or 16-bit random and sequential access - High-performance internal DMA for fast memory copying - High-performance hardware IP checksum calculations - Accessible in low-power modes - Space can be reserved for general purpose application usage in addition to transmit and receive packets • Operational: - Outputs for two LED indicators with support for single and dual LED configurations - Transmit and receive interrupts -25 MHz clock - 5V tolerant inputs - Clock out pin with programmable frequencies from 50 kHz to 33.3 MHz - Operating voltage range of 3.0V to 3.6V - Temperature range: -40°C to +85°C industrial • Available in 44-Pin (TQFP and QFN) and 64-Pin TQFP Package s Device SRAM (bytes) Pin Count Speed (Mbps) Security SPI PSP ModEx 1024-Bit MD5 SHA-1 AES 256-Bit Multiplexed Demultiplexed ENC424J600 24K 44 10/100 Y Y Y Y Y N N N ENC624J600 24K 64 10/100 Y Y Y Y Y Y Y Y Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface |
Similar Part No. - ENC624J600 |
|
Similar Description - ENC624J600 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
