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PCF2129A Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCF2129A Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 68 page PCF2129A_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 13 January 2010 7 of 68 NXP Semiconductors PCF2129A Integrated RTC, TCXO and quartz crystal CLKOUT control register 0Fh CLKOUT_ctl TCR[1:0] ---COF[2:0] 00 - - - 000 Watchdog registers 10h Watchdg_tim_ctl WD_CD T TI_TP - - - TF[1:0] 000 - - - 11 11h Watchdg_tim_val WATCHDG_TIM_VAL[7:0] XXXX XXXX Timestamp registers 12h Timestp_ctl TSM TSOFF - 1_O_16_TIMESTP[4:0] 00 - X XXXX 13h Sec_timestp - SECOND_TIMESTP (0 to 59) - XXX XXXX 14h Min_timestp - MINUTE_TIMESTP (0 to 59) - XXX XXXX 15h Hour_timestp - - AMPM HOUR_TIMESTP (1 to 12) in 12 h mode - - XX XXXX HOUR_TIMESTP (0 to 23) in 24 h mode - - XX XXXX 16h Day_timestp - - DAY_TIMESTP (1 to 31) - - XX XXXX 17h Mon_timestp ---MONTH_TIMESTP (1 to 12) - - - X XXXX 18h Year_timestp YEAR_TIMESTP (0 to 99) XXXX XXXX Aging offset register 19h Aging_offset ----AO[3:0] - - - - 1000 Internal registers 1Ah Internal_reg --------- - - - - - - - 1Bh Internal_reg --------- - - - - - - - Table 4. Register overview …continued Bit positions labeled as - are not implemented and will return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at power-on and unchanged by subsequent resets. Address Register name Bit Reset value 7 6 5 4 3 2 1 0 |
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