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TMX320C5514AZCH12 Datasheet(PDF) 1 Page - Texas Instruments |
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TMX320C5514AZCH12 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 138 page TMS320C5514 www.ti.com SPRS646 – JANUARY 2010 TMS320C5514 Fixed-Point Digital Signal Processor Check for Samples: TMS320C5514 1 Fixed-Point Digital Signal Processor 1.1 TMS320C5514 Features 1 • HIGHLIGHTS: • 16-/8-Bit External Memory Interface (EMIF) with Glueless Interface to: • High-Perf/Low-Power, C55x™ Fixed-Point DSP – 8-/16-Bit NAND Flash, 1- and 4-Bit ECC – 16.67/13.33/10/8.33-ns Instruction Cycle Time – 8-/16-Bit NOR Flash – 60-, 75-, 100-, 120-MHz Clock Rate – Asynchronous Static RAM (SRAM) • 256K Bytes On-Chip RAM – SDRAM/mSDRAM (1.8-, 2,5-, and 3.3-V) • 16-/8-Bit External Memory Interface (EMIF) • Direct Memory Access (DMA) Controller • Two MultiMedia Card/Secure Digital I/Fs – Four DMA With 4 Channels Each • Serial-Port I/F (SPI) With Four Chip-Selects (16-Channels Total) • Four Inter-IC Sound (I2S Bus™) • Three 32-Bit General-Purpose Timers • USB 2.0 Full- and High-Speed Device – One Selectable as a Watchdog and/or GP • Real-Time Clock (RTC) With Crystal Input • Two MultiMedia Card/Secure Digital (MMC/SD) • Four Core Isolated Power Supply Domains Interface s • Four I/O Isolated Power Supply Domains • Universal Asynchronous Receiver/Transmitter • Three integrated LDOs (UART) • Industrial Temperature Devices Available • Serial-Port Interface (SPI) With Four • 1.05-V Core, 1.8/2.5/2.8/3.3-V I/Os Chip-Selects • 1.3-V Core, 1.8/2.5/2.8/3.3-V I/Os • Master/Slave Inter-Integrated Circuit (I2C Bus™) • FEATURES: • Four Inter-IC Sound (I2S Bus™) for Data • High-Performance, Low-Power, TMS320C55x™ Transport Fixed-Point Digital Signal Processor • Device USB Port With Integrated 2.0 – 16.67-, 13.33, 10-, 8.33-ns Instruction Cycle High-Speed PHY that Supports: Time – USB 2.0 Full- and High-Speed Device – 60-, 75-, 100-, 120-MHz Clock Rate • Real-Time Clock (RTC) With Crystal Input, With – One/Two Instruction(s) Executed per Cycle Separate Clock Domain, Separate Power – Dual Multipliers [Up to 200 or 240 Million Supply Multiply-Accumulates per Second (MMACS)] • Four Core Isolated Power Supply Domains: – Two Arithmetic/Logic Units (ALUs) Analog, RTC, CPU and Peripherals, and USB – Three Internal Data/Operand Read Buses • Four I/O Isolated Power Supply Domains: RTC and Two Internal Data/Operand Write Buses I/O, EMIF I/O, USB PHY, and DVDDIO – Fully Software-Compatible With C55x • Three integrated LDOs (DSP_LDO, ANA_LDO, Devices and USB_LDO) to power the isolated domains: DSP Core, Analog, and USB Core, respectively – Industrial Temperature Devices Available • Low-Power S/W Programmable Phase-Locked • 256 K Bytes Zero-Wait State On-Chip RAM, Loop (PLL) Clock Generator Composed of: • On-Chip ROM Bootloader (RBL) to Boot From – 64K Bytes of Dual-Access RAM (DARAM), NAND Flash, NOR Flash, SPI EEPROM, SPI 8 Blocks of 4K x 16-Bit Serial Flash or I2C EEPROM – 192K Bytes of Single-Access RAM (SARAM), • IEEE-1149.1 (JTAG™) 24 Blocks of 4K x 16-Bit Boundary-Scan-Compatible • 128K Bytes of Zero Wait-State On-Chip ROM • Up to 26 General-Purpose I/O (GPIO) Pins (4 Blocks of 16K x 16-Bit) (Multiplexed With Other Device Functions) • 4M x 16-Bit Maximum Addressable External • 196-Terminal Pb-Free Plastic BGA (Ball Grid Memory Space (SDRAM/mSDRAM) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative Copyright © 2010, Texas Instruments Incorporated or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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