www.austriamicrosystems.com

Revision 1.00

7 - 13

AS1916 - AS1918

Data Sheet - D e t a i l e d D e s c r i p t i o n

8 Detailed Description

The AS1916 - AS1918 supervisory circuits were designed to generate a reset when the monitored supply voltage falls

The integrated watchdog timer (see Watchdog Input on page 8) helps mitigate against bad programming code or clock

signals, and/or poor peripheral response.

The active-low manual reset input (see Manual Reset Input on page 8) allows for an externally activated system reset.

RESET/RESETN

Whenever the monitored supply voltage falls below its reset threshold, the RESET output asserts low or the RESETN

output asserts high. Once the monitored voltage has stabilized, an internal timer keeps the reset asserted for the reset

Figure 10. Reset Timing Diagram

AS1916 - AS1918

Reset Timeout

Delay Generator

Watchdog Transition

Detector

Watchdog

Timer

+

–

1.26V

2

GND

5

4

WDI

1

RESETN/

RESET

3

MRN

1V

RESETN

RESET

GND

1V