US1050

2-37

Rev. 1.3

10/27/00

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Thermal Design

The US1050 incorporates an internal thermal shutdown

that protects the device when the junction temperature

exceeds the maximum allowable junction temperature.

Although this device can operate with junction tempera-

tures in the range of 150

selected heat sink be chosen such that during maxi-

mum continuous load operation the junction tempera-

ture is kept below this number. The example below

shows the steps in selecting the proper Regulator heat

sink for the worst case current consumption using Intel

200MHz microprocessor as the load .

Assuming the following specifications :

The steps for selecting a proper heat sink to keep the

junction temperature below 135

1) Calculate the maximum power dissipation using :

2) Select a package from the Regulator data sheet

and record its junction to case (or Tab) thermal

resistance.

Selecting TO220 package gives us :

3) Assuming that the heat sink is Black Anodized, cal-

culate the maximum Heat sink temperature allowed :

Assume ,

resistance for Black Anodized)

4) With the maximum heat sink temperature calcu-

lated in the previous step, the Heat Sink to Air thermal

resistance (

temperature rise above the ambient as follows :

5) Next , a heat sink with lower

lated in step 4 must be selected. One way to do this is

to simply look at the graphs of the “Heat Sink Temp

Rise Above the Ambient” vs. the “Power Dissipation” and

select a heat sink that results in lower temperature rise

than the one calculated in previous step. The following

heat sinks from AAVID and Thermaloy meet this crite-

ria.

Air Flow (LFM)

0

100

200

300

400

Thermalloy

6021PB

6021PB

6073PB

6109PB

7141D

AAVID

534202B 534202B 507302

575002

576802B

Note : For further information regarding the above com-

panies and their latest product offerings and application

support contact your local representative or the num-

bers listed below:

AAVID

PH# (603) 528 3400

Thermalloy

PH# (214) 243-4321

Designing for Microprocessor Applications

As it was mentioned before the US1050 is designed spe-

cifically to provide power for the new generation of the

low voltage processors requiring voltages in the range

of 2.5V to 3.6V generated by stepping down the

5V supply. These processors demand a fast regulator

that supports their large load current changes. The worst

case current step seen by the regulator is anywhere in

the range of 1 to 7A with the slew rate of 300 to 500 nS

which could happen when the processor transitions from

“Stop Clock” mode to the “Full Active” mode. The load

current step at the processor is actually much faster ,in

the order of 15 to 20 nS,however the decoupling capaci-

tors placed in the cavity of the processor socket handle

this transition until the regulator responds to the load

current levels. Because of this requirement the selec-

tion of high frequency low ESR and low ESL output ca-

pacitor is imperative in the design of these regulator cir-

cuits.

Figure 4 shows the effects of a fast transient on the

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