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SKY65066-360LF Datasheet(PDF) 2 Page - Skyworks Solutions Inc. |
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SKY65066-360LF Datasheet(HTML) 2 Page - Skyworks Solutions Inc. |
2 / 11 page DATA SHEET • SKY65066-360LF LOW NOISE AMPLIFIER Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 2 November 12, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201090E Table 1. SKY65066-360LF Signal Descriptions Pin # Name Description Pin # Name Description 1 BIAS1 Source lead for 1st stage transistor 5 FEEDBACK Connect to RFOUT/VDD2 to reduce gain of 2nd stage transistor 2 RFIN RF input 6 N/C No connection 3 N/C No connection 7 RFOUT/VDD2 RF output. Requires a DC bias using an RF choke inductor. 4 VDD1 1st stage DC power supply 8 BIAS2 Source lead for 2nd stage transistor Functional Description The SKY65066-360LF is a two stage LNA with an integrated interstage matching network and source inductors. The device has a tested low NF of 0.7 dB and gain of 16.5 dB. The device allows designers to adjust current and gain without degrading the NF. The external matching network largely dictates the RF performance of the device. The matching network is required for operation and special care should be taken when designing a circuit board layout for the SKY65066-360LF. There are four separate groups of external components: input, output, biasing, and feedback. Biasing To properly bias a depletion mode pHEMT, both the gate and drain of the device must be biased properly. At VGS = 0 V and VDS > 2 V, the amplifier stage is in its saturated state and draws the maximum amount of current, IDSS. A VDS of 5 V is recommended to ensure proper performance. To eliminate the need for a negative DC supply, self-biasing should be used when a resistor is placed between one of the source leads and ground. A bypass capacitor should be placed in parallel to this resistor to provide an RF ground and to ensure performance remains unchanged at the operating frequency. When current flows from drain to source and through the resistor, the source voltage becomes biased above DC ground. The gate pin of the device should be left unbiased at 0 V, which creates the desired negative VGS value. This simplifies the design by eliminating the need for a second DC supply. Values for resistor components R1 and R2 can be changed to easily increase or decrease the bias current to a desired level. The first stage is biased at 20 percent of IDSS to achieve the best NF performance. The gain and current of the 2nd stage amplifier can be adjusted without degrading the overall NF. More current in the 2nd stage yields better IP3 performance. Biasing components R1, R2, C1, and C2 should be placed as close to the package pins as possible. See Figure 12 for the recommended board layout. Source Inductance The source inductance required on pins 1 and 8 (BIAS1 and BIAS2 signals, respectively) has been integrated on the die. This simplifies board layout and reduces build variations. Input and Output RF Matching Network The input band-pass matching network consists of four components. Component C1 serves as the input DC blocking capacitor, C2 provides high frequency stability and improved input return loss, and L1 and L2 are responsible for the best noise match looking into the gate of the first stage amplifier. Excess board trace should be eliminated at the input of the device to minimize board losses. High-Q components should be used to achieve the best NF of the amplifier. Murata GJM series capacitors and Coilcraft HP or CS series inductors are recommended. Any excess board or component loss on the input of the device directly adds to the total measured NF. The output matching network is band-pass network optimized for output return loss. The SKY65066-360LF Evaluation Board assembly diagram is shown in Figure 13 and a circuit schematic is provided in Figure 14. Feedback Feedback is implemented in the recommended circuit on the 2nd stage transistor. Feedback improves the input and output return loss and high frequency stability. The gain of the device can be increased by increasing the value of R3, which reduces the amount of feedback present (gain for multiple feedback resistor values is shown in Figure 12). |
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