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MAX11800EWC+T Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX11800EWC+T Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 57 page Low-Power, Ultra-Small Resistive Touch-Screen Controllers with I2C/SPI Interface _______________________________________________________________________________________ 9 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (SDA, DIN, SCL, CLK, A0, CS, A1) Input Logic-High Voltage VIH 0.7 x VDD V Input Logic-Low Voltage VIL 0.3 x VDD V Input Leakage Current IIN VIN = 0V or VDD -1 +1 μA Input Hysteresis VHYS 0.5 x VDD V Input Capacitance 6pF DIGITAL OUTPUTS (SDA, DOUT, TIRQ) DOUT, ISOURCE = 1mA 0.9 x VDD Output Logic-High VOH TIRQ, CMOS configuration, ISOURCE = 1mA 0.9 x VDD V Output Logic-Low—TIRQ, DOUT VOL ISINK = 1mA 0.4 V Output Logic-Low—SDA VOL ISINK = 3mA 0.4 V TIRQ Pullup Resistor 125 k Ω ELECTRICAL CHARACTERISTICS (continued) (VDD = 1.7V to 3.6V, TA = -40°C to +85°C (MAX11800E–MAX11803E), TA = -40°C to +105°C (MAX11800G/MAX11801G), unless oth- erwise noted. Typical values are at TA = +25°C and VDD = 3.3V, unless otherwise noted.) I2C TIMING CHARACTERISTICS (VDD = 1.7V to 3.6V, TA = -40°C to +85°C (MAX11801E and MAX11803E), TA = -40°C to +105°C (MAX11801G), unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.3V, unless otherwise noted. See Figure 1.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Serial-Clock Frequency fSCL 0 400 kHz Bus Free Time tBUF Bus free time between STOP and START condition 1.3 μs Hold Time for START Condition tHD;STA After this period, the first clock pulse is generated 0.6 μs SCL Pulse-Width Low tLOW 1.3 μs SCL Pulse-Width High tHIGH 0.6 μs Setup Time for Repeated START (Sr) Condition tSU;STA 0.6 μs Data Hold Time tHD;DAT 0 900 ns Data Setup Time tSU;DAT 100 ns SDA and SCL Rise/Fall Time tR, tF Receiving 20 + CB/10 300 ns SDA and SCL Fall Time tTF Transmitting 20 + CB/10 250 ns Setup Time for STOP Condition tSU;STO 0.6 μs VDD = 1.7V to 2.7V 10 100 Bus Capacitance Allowed CB VDD = 2.7V to 3.6V 10 400 pF Pulse Width of Suppressed Spike tSP 50 ns |
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