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LT3060EDCTR Datasheet(PDF) 10 Page - Linear Technology |
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LT3060EDCTR Datasheet(HTML) 10 Page - Linear Technology |
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10 / 20 page  LT3060 10 3060f PIN FUNCTIONS REF/BYP (Pin 1 / Pin 8): Reference/Bypass. Connecting a single capacitor from this pin to GND bypasses the LT3060’s reference noise and soft-starts the reference. A 10nF bypass capacitor typically reduces output voltage noise to 30μVRMS in a 10Hz to 100kHz bandwidth. Soft- start time is directly proportional to the REF/BYP capacitor value. If the LT3060 is placed in shutdown, REF/BYP is actively pulled low by an internal device to reset soft-start. If low noise or soft-start performance is not required, this pin must be left floating (unconnected). Do not drive this pin with any active circuitry. ADJ (Pin 2 / Pin 7): Adjust. This pin is the error amplifier’s inverting terminal. It’s typical bias current of 15nA flows out of the pin (see curve of ADJ Pin Bias Current vs Temperature in the Typical Performance Characteristics section). The ADJ pin voltage is 600mV referenced to GND. OUT (Pins 3, 4 / Pin 6): Output. These pin(s) supply power to the load. Stability requirements demand a minimum 2.2μF ceramic output capacitor to prevent oscillations. Large load transient applications require larger output capacitors to limit peak voltage transients. See the Applications Information section for details on transient response and reverse output characteristics. Permissible output voltage range is 600mV to 44.5V. IN (Pins 5, 6 / Pin 5): Input. These pin(s) supply power to the device. The LT3060 requires a local IN bypass capacitor if it is located more than six inches from the main input filter capacitor. In general, battery output impedance rises with frequency, so adding a bypass capacitor in battery- powered circuits is advisable. An input bypass capacitor in the range of 1μF to 10μF suffices. The LT3060 withstands reverse voltages on the IN pin with respect to its GND and OUT pins. In a reversed input situation, such as a battery plugged in backwards, the LT3060 behaves as if a large resistor is in series with its input. Limited reverse current flows into the LT3060 and no reverse voltage appears at the load. The device protects itself and the load. SHDN (Pin 7 / Pin 1): Shutdown. Pulling the SHDN pin low puts the LT3060 into a low power state and turns the output off. Drive the SHDN pin with either logic or an open collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain logic, normally several microamperes, and the SHDN pin current, typically less than 3μA. If unused, connect the SHDN pin to IN. The LT3060 does not function if the SHDN pin is not connected. The SHDN pin cannot be driven below GND unless tied to the IN pin. If the SHDN pin is driven below GND while IN is powered, the output may turn on. SHDN pin logic cannot be referenced to a negative supply voltage. GND (Pin 8, Exposed Pad Pin 9 / Pins 2, 3, 4): Ground. Connect the bottom of the external resistor divider that sets the output voltage directly to GND for optimum regulation. For the DFN package, tie exposed pad Pin 9 directly to Pin 8 and the PCB ground. This exposed pad provides enhanced thermal performance with its connection to the PCB ground. See the Applications Information section for thermal considerations and calculating junction temperature. (DC8/TS8) |
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