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LTC4449 Datasheet(PDF) 7 Page - Linear Technology |
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LTC4449 Datasheet(HTML) 7 Page - Linear Technology |
7 / 12 page LTC4449 7 4449f OPERATION TIMING DIAGRAM Figure 1. Three-State Input Operation VIL(BG) VIL(TG) VIL(BG) 90% IN TG BG 90% 10% tr(TG) tpLH(TG) 10% tr(BG) 4449 TD tf(BG) tf(TG) tpLH(BG) tpHL(BG) tpHL(TG) Overview The LTC4449 receives a ground-referenced, low voltage digital input signal to drive two N-channel power MOSFETs in a synchronous power supply configuration. The gate of the low side MOSFET is driven either to VCC or GND, depending on the state of the input. Similarly, the gate of the high side MOSFET is driven to either BOOST or TS by a supply bootstrapped off of the switch node (TS). Input Stage The LTC4449 employs a unique three-state input stage with transition thresholds that are proportional to the VLOGIC supply. The VLOGIC supply can be tied to the controller IC’s power supply so that the input thresholds will match those of the controller’s output signal. Alternatively, VLOGIC can be tied to VCC to simplify routing. An internal voltage regulator in the LTC4449 limits the input threshold values for VLOGIC supply voltages greater than 5V. The relationship between the transition thresholds and the three input states of the LTC4449 is illustrated in Figure 1. When the voltage on IN is greater than the threshold VIH(TG), TG is pulled up to BOOST, turning the high side MOSFET on. This MOSFET will stay on until IN falls below VIL(TG). Similarly, when IN is less than VIH(BG), BG is pulled up to VCC, turning the low side (synchronous) MOSFET on. BG will stay high until IN increases above the threshold VIL(BG). The thresholds are positioned to allow for a region in which both BG and TG are low. An internal resistive divider will pull IN into this region if the signal driving the IN pin goes into a high impedance state. One application of this three-state input is to keep both of the power MOSFETs off while an undervoltage condition exists on the controller IC power supply. This can be accomplished by driving the IN pin with a logic buffer that has an enable pin. With the enable pin of the buffer tied to the power good pin of the controller IC, the logic buffer output will remain in a high impedance state until the controller confirms that its supply is not in an undervoltage state. The three-state input of the LTC4449 will therefore pull IN into the region where TG and BG are low until the controller has enough voltage to operate predictably. TG HIGH TG HIGH VIH(TG) VIL(BG) VIL(TG) VIH(BG) IN TG LOW TG LOW BG LOW BG HIGH 4449 F01 BG LOW BG HIGH |
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