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LTC2259-16 Datasheet(PDF) 7 Page - Linear Technology |
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LTC2259-16 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 28 page  7 225916f LTC2259-16 TIMING DIAGRAMS Double-Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels tH tD •• • tD tC tC tL D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 D14N-2 D15N-2 tAP N + 1 N + 2 N + 4 N + 3 N ANALOG INPUT ENC– ENC+ D0_1 D14_15 CLKOUT+ CLKOUT– 225916 TD02 Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels tH tD tC tL N – 5 N – 4 N – 3 N – 2 N – 1 tAP N + 1 N + 2 N + 4 N + 3 N ANALOG INPUT ENC– ENC+ CLKOUT+ CLKOUT– D0-D15 225916 TD01 |
Similar Part No. - LTC2259-16 |
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