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IP4064CX8 Datasheet(PDF) 10 Page - NXP Semiconductors |
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IP4064CX8 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 14 page IP4064CX8_IP4364CX8_IP4366CX8_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 11 February 2010 10 of 14 NXP Semiconductors IP4064CX8; IP4364CX8; IP4366CX8 Integrated SIM card passive filter array with ESD protection For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description”. 9.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • The size of the solder land on the substrate • The bump height on the chip The higher the stand off, the better the stresses are released due to TEC (Thermal Expansion Coefficient) differences between substrate and chip. 9.3.2 Quality of solder joint A flip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. The surface of the joint should be smooth and the shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps after reflow can occur during the reflow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. No failures have been found to be related to these voids. Solder joint inspection after reflow can be done with X-ray to monitor defects such as bridging, open circuits and voids. 9.3.3 Rework In general, rework is not recommended. By rework we mean the process of removing the chip from the substrate and replacing it with a new chip. If a chip is removed from the substrate, most solder balls of the chip will be damaged. In that case it is recommended not to re-use the chip again. MSL: Moisture Sensitivity Level Fig 9. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature |
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