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PAC407BCA Datasheet(PDF) 11 Page - Pixart Imaging Inc. |
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PAC407BCA Datasheet(HTML) 11 Page - Pixart Imaging Inc. |
11 / 24 page PAC407BCA/PAC407BCW CMOS Image Sensor IC Version 1.7, 13 Sep 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 11 5. 2TM IC Bus PAC407 supports 2TM IC bus transfer protocol and acts as slave device. The 7 bits unique slave address is 1000000 and the bus supports receiving / transmitting speed up to 400kHz. 5.1. 2TM IC Bus Overview There are only two lines SDA (serial data) and SCL (serial clock) carry information between the devices which are connected by 2TM IC bus. Normally both SDA and SCL lines are open collector structure and pulled high by external pull-up resistors. Only the master can initiate a transfer (start), generate clock signals, and terminate a transfer (stop). Start Condition : A high to low transition of the SDA line while SCL is high defines a start condition. Stop Condition : A low to high transition of the SDA line while SCL is high defines a stop condition. Valid Data: The data on the SDA line must be stable during the high period of the SCL clock. Within each byte, MSB is always transferred first. Read/write control bit is the LSB of the first byte. Both the master and slave can transmit and receive data from the bus. Acknowledge : The receiving device should pull down the SDA line during high period of the SCL clock line when a byte was transferred completely by transmitter. When in the case of that a master received data from a slave, the master does not generate an acknowledgment on the last byte to indicate the end of a master read cycle. Figure 5-1: Start and Stop Conditions Figure 5-2: Valid Data DATA STABLE DATA CHANGE ALLOWED SDA SCL S Start Condition SDA SCL P Stop Condition |
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