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HYMD216M646C6-D43 Datasheet(PDF) 9 Page - Hynix Semiconductor |
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HYMD216M646C6-D43 Datasheet(HTML) 9 Page - Hynix Semiconductor |
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9 / 19 page  HYMD216M646C(L)6-D43/D4/J Rev. 0.1 / Apr. 2003 9 DC CHARACTERISTICS II (TA=0 to 70oC, Voltage referenced to VSS = 0V) Parameter Symbol Test Condition Speed Unit Note -D43 -D4 -J Operating Current IDD0 One bank; Active - Precharge; tRC=tRC(min); tCK=tCK(min); DQ,DM and DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle TBD TBD 420 mA Operating Current IDD1 One bank; Active - Read - Precharge; Burst Length=2; tRC=tRC(min); tCK=tCK(min); address and control inputs changing once per clock cycle TBD TBD 600 mA Precharge Power Down Standby Current IDD2P All banks idle; Power down mode; CKE=Low, tCK=tCK(min) TBD TBD 80 mA Idle Standby Current IDD2F /CS=High, All banks idle; tCK=tCK(min); CKE= High; address and control inputs changing once per clock cycle. VIN=VREF for DQ, DQS and DM TBD TBD 200 mA Active Power Down Standby Current IDD3P One bank active ; Power down mode; CKE=Low, tCK=tCK(min) TBD TBD 100 mA Idle Quiet Standby Current IDD2Q /CS>=Vih(min); All banks idle; CKE>=Vih(min); Addresses and other control inputs stable, Vin=Vref for DQ, DQS and DM TBD TBD TBD mA Active Standby Current IDD3N /CS=HIGH; CKE=HIGH; One bank; Active- Precharge; tRC=tRAS(max); tCK=tCK(min); DQ, DM and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per clock cycle TBD TBD 240 mA Operating Current IDD4R Burst=2; Reads; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK(min); IOUT=0mA TBD TBD 1160 mA Operating Current IDD4W Burst=2; Writes; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK(min); DQ, DM and DQS inputs changing twice per clock cycle TBD TBD 1160 Auto Refresh Current IDD5 tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz, 10*tCK for DDR266A & DDR266B at 133Mhz; distributed refresh TBD TBD 920 Self Refresh Current IDD6 CKE=<0.2V; External clock on; tCK =tCK(min) Normal TBD TBD 12 mA Low Power TBD TBD 6 mA Operating Current - Four Bank Operation IDD7 Four bank interleaving with BL=4 Refer to the following page for detailed test condition TBD TBD 1340 mA Random Read Current IDD7A 4banks active read with activate every 20ns, AP(Auto Precharge) read every 20ns, BL=4, tRCD=3, IOUT=0 mA, 100% DQ, DM and DQS inputs changing twice per clock cycle; 100% addresses changing once per clock cycle TBD TBD TBD mA |
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Similar Description - HYMD216M646C6-D43 |
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