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HY5DW113222FM-36 Datasheet(PDF) 4 Page - Hynix Semiconductor

Part # HY5DW113222FM-36
Description  512M(16Mx32) GDDR SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY5DW113222FM-36 Datasheet(HTML) 4 Page - Hynix Semiconductor

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Rev. 0.1 / Oct. 2004
4
HY5DW113222FM(P)
PIN CONFIGURATION (Top View)
ROW and COLUMN ADDRESS TABLE
Items
16Mx32
Organization
2M x 32 x 4banks x 2chip
Row Address
A0 ~ A11
Column Address
A0 ~ A7, A9
Bank Address
BA0, BA1
Auto Precharge Flag
A8
Refresh
4K
Chip Selection
CS0, CS1
Note:
1. 16Mx32 DDR is composed of two 8Mx32 DDR.
2. Multi-chip(16Mx32 DDR) is controlled by CS0 and CS1, individually.
Note :
1. Outer ball, A1~A14, P1~P14, A1~P1, A14~P14 are depopulated.
2. Ball L9(NC2) is reserved for A12.
3. Ball M10(NC3) is reserved for BA2.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DQS0
DM0
VSSQ
DQ3
DQ2
DQ0
DQ31
DQ29
DQ28
VSSQ
DM3
DQS3
DQ4
VDDQ
NC
VDDQ
DQ1
VDDQ
VDDQ
DQ30
VDDQ
NC
VDDQ
DQ27
DQ6
DQ5
VSSQ
VSSQ
VSSQ
VDD
VDD
VSSQ
VSSQ
VSSQ
DQ26
DQ25
DQ7
VDDQ
VDD
VSS
VSSQ
VSS
VSS
VSSQ
VSS
VDD
VDDQ
DQ24
DQ17
DQ16
VDDQ
VSSQ
VSS
Termal
VSS
Termal
VSS
Termal
VSS
Termal
VSSQ
VDDQ
DQ15
DQ14
DQ19
DQ18
VDDQ
VSSQ
VSS
Termal
VSS
Termal
VSS
Termal
VSS
Termal
VSSQ
VDDQ
DQ13
DQ12
DQS2
DM2
NC
VSSQ
VSS
Termal
VSS
Termal
VSS
Termal
VSS
Termal
VSSQ
NC
DM1
DQS1
DQ21
DQ20
VDDQ
VSSQ
VSS
Termal
VSS
Termal
VSS
Termal
VSS
Termal
VSSQ
VDDQ
DQ11
DQ10
DQ22
DQ23
VDDQ
VSSQ
VSS
VSS
VSS
VSS
VSSQ
VDDQ
DQ9
DQ8
/CAS
/WE
VDD
VSS
A10
VDD
VDD
NC2
VSS
VDD
NC
NC
/RAS
NC
/CS1
BA1
A2
A11
A9
A5
NC3
CLK
/CLK
NC
NC
BA0
A0
A1
A3
A4
A6
A7
A8/AP
CKE
VREF
/CS0


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