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VG3664321412BT Datasheet(PDF) 10 Page - Vanguard International Semiconductor |
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VG3664321412BT Datasheet(HTML) 10 Page - Vanguard International Semiconductor |
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10 / 72 page  Document : 1G5-0099 Rev.1 Page 10 VIS Preliminary VG3664321(4)1(2)BT CMOS Synchronous Dynamic RAM 2.Truth Table 2.1 Command Truth Table Notes : (1) Bank address. lt would be different from organizations. 2.2 DQM Truth Table 2.3 CKE Truth Table H : High level, L : Low level X : High or Low level (Don’t care), V : Valid Data input FUNCTION Symbol CKE CS RAS CAS WE BA(1) A10 A9 - A0 n - 1 n Device deselect DESL H X H X X X X X X No operation NOP H X L H H H X X X Mode register set MRS H X L L L L L L V Bank activate ACT H X L L H H V V V Read READ H X L H L H V L V Read with auto precharge READA H X L H L H V H V Write WRIT H X L H L L V L V Write with auto precharge WRITA H X L H L L V H V Precharge select bank PRE H X L L H L V L X Precharge all banks PALL H X L L H L X H X Burst stop BST H X L H H L X X X CBR (Auto) refresh REF H H L L L H X X X Self refresh SELF H L L L L H X X X FUNCTION Symbol CKE DQM n - 1 n - 1 3 2 1 0 Data write/output enable ENB H X L Data mask/output disable MASK H X H DQ24 ~ DQ31 write enable/output enable ENB3 H X L X X X DQ16 ~ DQ23 write enable/output enable ENB2 H X X L X X DQ8 ~ DQ7 write enable/output enable ENB1 H X X X L X DQ0 ~ DQ7 write enable/output enable ENB0 H X X X X L DQ24 ~ DQ31 write enable/output enable MASK3 H X H X X X DQ16 ~ DQ23 write enable/output enable MASK2 H X X H X X DQ8 ~ DQ15 write enable/output enable MASK1 H X X X H X DQ0 ~ DQ7 write enable/output enable MASK0 H X X X H Current State Function Symbol CKE CS RAS CAS WE Add ress n - 1 n Activating Clock suspend mode entry H L X X X X X Any Clock suspend L L X X X X X Clock suspend Clock suspend mode exit L H X X X X X Idle CBR refresh command REF H H L L L H X Idle Self refresh entry SELF H L L L L H X Self refresh Self refresh exit L H L H H H X L H H X X X X Idle Power down entry H L X X X X X Power down Power down exit L H X X X X X |
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