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VG4616321BQ-6R Datasheet(PDF) 5 Page - Vanguard International Semiconductor |
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VG4616321BQ-6R Datasheet(HTML) 5 Page - Vanguard International Semiconductor |
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5 / 82 page  Document:1G5-0145 Rev.1 Page 5 VIS VG4616321B/VG4616322B 262,144x32x2-Bit Preliminary CMOS Synchronous Graphic RAM 23,56,24, 57 DQM0- DQM3 Input Data Input/Output Mask: DQM0-DQM3 are byte specific, nonpersistent I/O buffer controls. The I/O buffers are placed in a high-z state when DQM is sampled HIGH. Input data is masked when DQM is sampled HIGH during a write cycle. Output data is masked (two-clock latency) when DQM is sampled HIGH during a read cycle. DQM3 masks DQ31-DQ24, DQM2 masks DQ23-DQ16, DQM1 masks DQ15-DQ8, and DQM0 masks DQ7-DQ0. 97,98,100, 1,3,4,6,7, 60,61,63, 64,68,69, 71,72,9, 10,12,13, 17,18,20, 21,74,75, 77, 78,80, 81, 83, 84 DQ0- DQ31 Input/ Output Data I/O: The DQ0-31 input and output data are synchronized with the positive edges of CLK. The I/Os are byte-maskable during Reads and Writes. The DQs also serve as column/byte mask inputs during Block Writes. 30,36-45, 52,86-95 NC - No Connect: These pins should be left unconnected. 58 NC/Vref -/Input No connect/Input Voltage Reference : It must be unconnected when the LVTTL interface is used in the SGRAM. It must be applied to Vref (1.5V) when the SSTL-3 interface is used in the SGRAM. 2,8,14,22, 59,67,73, 79 VDDQ Supply DQ Power: Provide isolated power to DQs for improved noise immunity. 5,11,19, 62,70,76, 82,99 VSSQ Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity. 15,35,65, 96 VDD Supply Power Supply: +3.3V 16,46,66, 85 VSS Supply Ground 0.3V ± |
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