Dual Per-Pin Parametric

Measurement Units

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7

Note 2:

The device operates properly with different supply voltages with equally different voltage swings.

Note 3:

Interpret errors expressed in terms of %FSR (percent of full-scale range) as a percentage of the end-point-to-end-point

range, i.e., for the ±64mA range, the full-scale range = 128mA, and a 1% error = 1.28mA.

Note 4:

Case must be maintained ±5°C for linearity specifications.

Note 5:

Tested in range C.

Note 6:

Current linearity specifications are maintained to within 700mV of the clamp voltages when the clamps are enabled.

Note 7:

Specified as the percent of full-scale range change at the output per volt change in the DUT voltage.

Note 8:

Note 9:

Note 10: Guaranteed by design.

Note 11: Settling times are to 0.1% of FSR. Cx_ = 60pF.

Note 12: All settling times are specified using a single compensation capacitor (Cx_) across all current-sense resistors. Use an indi-

vidual capacitor across each sense resistor for better performance across all current ranges, particularly the lower ranges.

Note 13: The propagation delay time is only guaranteed over the force-voltage output range. Propagation delay is measured by

AC ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCLK Fall to DOUT Valid

22

ns

CS Low to SCLK High

Setup

10

ns

SCLK High to

CS High

Hold

22

ns

SCLK High to

CS Low

Hold

0ns

CS High to SCLK High

Setup

5ns

DIN to SCLK High Setup

10

ns

DIN to SCLK High Hold

(Note 13)

0

ns

CS Pulse-Width High

10

ns

CS Pulse-Width Low

10

ns

LOAD Pulse-Width Low

20

ns

(Power-Up)

(Note 13)

500

ns