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842S104CGLFT Datasheet(PDF) 2 Page - Integrated Device Technology |
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842S104CGLFT Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 21 page ICS842S104CG REVISION A MARCH 17, 2010 2 ©2010 Integrated Device Technology, Inc. ICS842S104 Data Sheet CRYSTAL-TO- HSTL 100MHZ / 200MHZ PCI EXPRESS™ CLOCK SYNTHESIZER Table 1. Pin Descriptions NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Number Name Type Description 1, 2 SRCT3, SRCC3 Output Differential output pair. HSTL interface levels. 3, 9, 11, 13, 16 VSS Power Power supply ground. 4, 22 VDDO Power Output power supply pins. 5, 6 SRCT2, SRCC2 Output Differential output pair. HSTL interface levels. 7, 8 SRCT1, SRCC1 Output Differential output pair. HSTL interface levels. 10, 17 VDD Power Core supply pins. 12, 15 nc Unused No connect. 14 VDDA Power Analog supply for PLL. 18, 19 XTAL_IN, XTAL_OUT Input Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output. 20 SCLK Input Pullup I2C compatible SCLK. This pin has an internal pullup resistor. LVCMOS/LVTTL interface levels. 21 SDATA I/O Pullup I2C compatible SDATA. This pin has an internal pullup resistor. LVCMOS/LVTTL interface levels. 23, 24 SRCT4, SRCC4 Output Differential output pair. HSTL interface levels. Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 2pF RPULLUP Input Pullup Resistor 51 k Ω |
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