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WM2616 Datasheet(PDF) 2 Page - Wolfson Microelectronics plc |
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WM2616 Datasheet(HTML) 2 Page - Wolfson Microelectronics plc |
2 / 9 page WM2616 Production Data Rev 1.0 WOLFSON MICROELECTRONICS LTD Production Data Rev 1.0 June 1999 2 PIN CONFIGURATION 1 2 3 4 NCS DIN SCLK AGND REFIN FS VDD OUT 5 6 7 8 PIN DESCRIPTION PIN NO NAME TYPE DESCRIPTION 1 DIN Digital input Serial data input. 2 SCLK Digital input Serial clock input. 3 NCS Digital input Chip select. This pin is active low. 4 FS Digital input Frame synchronisation for serial input data. 5 AGND Supply Analogue ground. 6 REFIN Analogue input Voltage reference input. 7 OUT Analogue output DAC analogue output 8 VDD Supply Positive power supply. ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. CONDITION MIN MAX Supply voltage, VDD to AGND 7V Digital input voltage -0.3V VDD + 0.3V Reference input voltage -0.3V VDD + 0.3V Operating temperature range, TA WM2616CD WM2616ID 0 °C -40 °C 70 °C 85 °C Storage temperature -65 °C 150 °C Lead temperature 1.6mm (1/16 inch) soldering for 10 seconds 260 °C RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Supply voltage VDD 2.7 5.5 V High-level digital input voltage VIH VDD = 2.7V to 5.5V 2 V Low-level digital input voltage VIL VDD = 2.7V to 5.5V 0.8 V Reference voltage to REFIN VREF See Note VDD - 1.5 V Load resistance RL 2 10 k Ω Load capacitance CL 100 pF Serial clock rate fSCLK 20 MHz WM2616CD 0 70 °C Operating free-air temperature TA WM2616ID -40 85 °C Note: Reference input voltages greater then VDD/2 will cause saturation for large DAC codes. |
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